Jump to content
  • entries
    41
  • comments
    373
  • views
    63,844

Supersize me!


batari

3,400 views

I thought this should get its own blog entry.

 

I built a prototype 128k-256k 2600 cart, and it works! If I can make this a reality, I won't need to worry about limiting the number of tracks in Superbug.

blogentry-5792-1191783649_thumb.jpg

But actually I can't take credit for this, because without Supercat's 0840 cart design and his comments on how to expand the design, this wouldn't have happened. But regardless, with only a 16v8 and 270x0 EPROM needed, this has the potential to be just as inexpensive and simple to build as standard F8-F6-F4 carts. (Also, for hardware purists, all parts in this design were readily available during the 80's.)

 

This of course means my VHDL code is correct, and the Atmel 16v8 doesn't mind the Cypress-generated JEDEC file.

 

There is one slight change in the design, and I want to get the issue straightened out before I proceed. The pins on the PLD called capin and capout turned out to not need a caps and resistor (or at least the RC didn't seem to help or hurt the operation, so I just physically connected them together.) But it turned out that an RC was needed on the A11 input to the PLD. My only guess is that the A11 line was changing before A12 could be inverted inside the PLD and ANDed with A11, so it caused a glitch. So I assume that the RC delays A11 enough to skip over the glitch. Does this sound reasonable?

 

The working name is "Supersize" which is sort of fitting, as it's done for a game called Superbug, it's largely the brainchild of Supercat, and also the name is similar to other 2600 hardware (e.g. Superchip, Supercharger.) I suppose it doesn't have much to do with greasy fast food, so I'm open to suggestions for new names but they must have "Super" in them :)

 

I've added Stella support for these large carts. I'll submit the code as soon as a name is established.

 

Next step: board layout.

 

Another problem I can see is that the 32-pin DIP EPROM will not fit in the standard location on an Atari cart shell (too wide.) This means that it would need to be placed above the screw hole, meaning a bigger board is needed, and that may increase costs somewhat. A socketed PLCC may result in a smaller board, but this will also increase part costs, maybe even more.

 

I wonder if there are any freely available 2600 cart layouts to start from so I don't need to reinvent the wheel? Preferably, one for a larger board that includes the screw hole.

42 Comments


Recommended Comments



Is "Supercart" used yet?

 

Maybe "Superbank"?

 

"Super-Duperchip"?

 

Okay... maybe not that last one. :lol:

Maybe "Superbanking" instead?

 

Maybe not Supercart, this cart's only "super" in terms of size. Plus I think the 4A50 has been informally called that.

 

I suppose "Super" doesn't need to be in there. We could just give it an appropriate female name like those old Atari products. Any suggestions?

Link to comment

If you have a resistor between CAPOUT and CAPIN, and a cap between CAPIN and VSS, you should not need an RC circuit feeding A11. If you do not have the RC circuit feeding CAPIN, I would expect an RC circuit on A11 would cause the banking chip to work correctly with code running in the 1000-17FF range, but cause accidental bank-switches when accessing zero page from code running in the 1800-1FFF range.

Link to comment
If you have a resistor between CAPOUT and CAPIN, and a cap between CAPIN and VSS, you should not need an RC circuit feeding A11. If you do not have the RC circuit feeding CAPIN, I would expect an RC circuit on A11 would cause the banking chip to work correctly with code running in the 1000-17FF range, but cause accidental bank-switches when accessing zero page from code running in the 1800-1FFF range.

Yeah, it didn't seem right.

 

I did try it that way, but it turns out I was using too large a cap. I have a bunch 0.1 uF and 100 pf caps that are identical in appearance. So it works now with the correct cap (the way it was intended to...)

Link to comment
We'll have to make sure we support that in Chimera (up to 128K). Sounds like a useful scheme. How does one write to RAM?

There's no RAM, just a big EPROM with simple logic. Or, if you meant how do you switch banks, the typical hotspots would be $0800-$081F (for 128k) or $0800-$083F (for 256k) and they are mirrored every 32 or 64 bytes, respectively, until $0FFF.

Link to comment
We could just give it an appropriate female name like those old Atari products. Any suggestions?

 

Ramona :lol:

Nice, but I like Superbank or Superbanking.

 

EDIT: And holy crap if you get this working this will be awesome. Seriously, 128-256K for the same price as F4-etc.?

Link to comment

Univega here, apparently they've been mergered upon. It's been seeing a lot of action of late in an effort to improve my cholesterol levels, part of why work on Cannonfire has been slower than I'd like. I had a follow-up blood test this morning, should know the results in a week or two.

Link to comment
We could just give it an appropriate female name like those old Atari products. Any suggestions?

 

Ramona :lol:

Nice, but I like Superbank or Superbanking.

 

EDIT: And holy crap if you get this working this will be awesome. Seriously, 128-256K for the same price as F4-etc.?

Laying out the board right now. I might be able to make both a DIP and PLCC (socketed through-hole) version. The PLCC version is likely to be cheaper overall if using new parts. The DIP version would be good for those with stacks of DIP EPROMs (I personally have 200 128kX8 DIP EPROMs.)

 

I like SUPER (with the recursive backronym.) Better than the ideas I came up with last night, like BFC: Big Fun Cart (or maybe Big F'un Cart?)

Link to comment
Laying out the board right now. I might be able to make both a DIP and PLCC (socketed through-hole) version. The PLCC version is likely to be cheaper overall if using new parts. The DIP version would be good for those with stacks of DIP EPROMs (I personally have 200 128kX8 DIP EPROMs.)

 

If practical, it would be nice to have space for a SARA chip. If SARA functionality isn't needed, it could would be easy to jumper it out. Since the hotspots are all at address 01xxx*, there should be no problem using the A12 output of the SARA chip to feed the PLD (it would turn addresses of the form 10000* into 00000*, but that shouldn't affect banking).

 

It might be fun to also support an EEPROM. Would it be worth trying to incorporate such functionality do you think?

Link to comment
Univega here, apparently they've been mergered upon. It's been seeing a lot of action of late in an effort to improve my cholesterol levels, part of why work on Cannonfire has been slower than I'd like. I had a follow-up blood test this morning, should know the results in a week or two.

I managed to get my levels down a couple of years ago with exercise and Omega-3 supplements (I'm sure my cholesterol is back up now, since I haven't been working at it for about a year). Look in the vitamin section for "Fish oil" - and get the pills that say "odorless" or "no fish burps" (yes, they actually say that). My doctor recommended it, and I still take it.

 

And I owned a Nishiki for almost 30 years. But I finally got rid of it, since I never rode it. It was an old 10-speed, and just wasn't suited to anything but absolutely smooth pavement. I need to get something halfway between a ten-speed and a mountain bike.

Link to comment
I like SUPER (with the recursive backronym.) Better than the ideas I came up with last night, like BFC: Big Fun Cart (or maybe Big F'un Cart?)

 

Switch Using Previously Excluded Region, Cheapening ARcade Translations.

 

Though actually I think "SuperCart" would probably be overly confused with "Superchip cart" (Millipede, Dig Dug, etc.)

Link to comment
:lol: "recursive acronym".

forgot there's a good chance people here will know what recursion is.

 

I managed to get my levels down a couple of years ago with exercise and Omega-3 supplements (I'm sure my cholesterol is back up now, since I haven't been working at it for about a year). Look in the vitamin section for "Fish oil" - and get the pills that say "odorless" or "no fish burps" (yes, they actually say that). My doctor recommended it, and I still take it.
have to check into that, though I'll have to admit it brings back memories of gagging down minty cod liver oil as a kid.
And I owned a Nishiki for almost 30 years. But I finally got rid of it, since I never rode it. It was an old 10-speed, and just wasn't suited to anything but absolutely smooth pavement. I need to get something halfway between a ten-speed and a mountain bike.

While Houston's flat, only hills around are man made, I went ahead and got a mountain bike as I like to take it off road.

Link to comment
Laying out the board right now. I might be able to make both a DIP and PLCC (socketed through-hole) version. The PLCC version is likely to be cheaper overall if using new parts. The DIP version would be good for those with stacks of DIP EPROMs (I personally have 200 128kX8 DIP EPROMs.)

 

If practical, it would be nice to have space for a SARA chip. If SARA functionality isn't needed, it could would be easy to jumper it out. Since the hotspots are all at address 01xxx*, there should be no problem using the A12 output of the SARA chip to feed the PLD (it would turn addresses of the form 10000* into 00000*, but that shouldn't affect banking).

 

It might be fun to also support an EEPROM. Would it be worth trying to incorporate such functionality do you think?

A serial EEPROM, if that's what you mean. If you are using 128k, there would be one macrocell available to drive it. (You'd need a different PLD program but that's not a big deal.) But the only way I'd want to do it is if it did not add any board space, and its holes could safely be left unpopulated if not needed. In the DIP version, there will probably be space for the chip somewhere.

 

Actually, there might be a way to free up an input and an output if we add two diodes, and that would allow for something like that. Not sure though, but it would be easy to try it out while the proto board is still wired up.

 

Also, I don't want to support a SARA chip - I'd rather figure out how to add SARA support to a PLD and use a standard SRAM chip for the RAM so we wouldn't need to rely on salvaging the chips from existing carts. I worked on this a couple of years ago and never got it working on the proto board (though it worked in simulation.)

 

Acronym: maybe SUPER UPgraded EPROM Resources?

 

Still could be SUPERbanking.

Link to comment
A serial EEPROM, if that's what you mean. If you are using 128k, there would be one macrocell available to drive it. (You'd need a different PLD program but that's not a big deal.) But the only way I'd want to do it is if it did not add any board space, and its holes could safely be left unpopulated if not needed. In the DIP version, there will probably be space for the chip somewhere.

 

Another approach I was thinking of for the EEPROM would be to have a 24-pin area for a 16V8/22V10, with pin 1 being the same for either chip (if not using the EEPROM, just put a 16V8 in the upper 20 holes). It's too bad I believe the 16V8 requires pin 11 to be grounded; otherwise things would be much easier.

 

There are tradeoffs between execution speed, board space, jumpering requirements (when not using EEPROM), etc. If you like I can sketch out some options.

 

Also, I don't want to support a SARA chip - I'd rather figure out how to add SARA support to a PLD and use a standard SRAM chip for the RAM so we wouldn't need to rely on salvaging the chips from existing carts. I worked on this a couple of years ago and never got it working on the proto board (though it worked in simulation.)

 

I think CPUwiz has a supply of SARA chips which should be adequate for awhile. If I'd known of them, I wouldn't have bothered with the 4A50 board which was intended to be the cheapest possible expanded-RAM board using modern chips. I really can't think of any way one could manage RAM more cheaply than I have done without using custom silicon.

Link to comment
A serial EEPROM, if that's what you mean. If you are using 128k, there would be one macrocell available to drive it. (You'd need a different PLD program but that's not a big deal.) But the only way I'd want to do it is if it did not add any board space, and its holes could safely be left unpopulated if not needed. In the DIP version, there will probably be space for the chip somewhere.

 

Another approach I was thinking of for the EEPROM would be to have a 24-pin area for a 16V8/22V10, with pin 1 being the same for either chip (if not using the EEPROM, just put a 16V8 in the upper 20 holes). It's too bad I believe the 16V8 requires pin 11 to be grounded; otherwise things would be much easier.

 

There are tradeoffs between execution speed, board space, jumpering requirements (when not using EEPROM), etc. If you like I can sketch out some options.

 

Also, I don't want to support a SARA chip - I'd rather figure out how to add SARA support to a PLD and use a standard SRAM chip for the RAM so we wouldn't need to rely on salvaging the chips from existing carts. I worked on this a couple of years ago and never got it working on the proto board (though it worked in simulation.)

 

I think CPUwiz has a supply of SARA chips which should be adequate for awhile. If I'd known of them, I wouldn't have bothered with the 4A50 board which was intended to be the cheapest possible expanded-RAM board using modern chips. I really can't think of any way one could manage RAM more cheaply than I have done without using custom silicon.

Well, there will probably be some free board space on the DIP version. I think an 8-pin serial EEPROM should be more than enough for a single cart (I think they are available from 128 bytes up to 8k bytes) and will be more likely to fit. However, my feeling is that most wouldn't use the EEPROM, so if those extra holes, jumpers and the like increased board size at all, I'm not sure it would be worth it. Also I'm not too fond of making space for a 22V10 if its only purpose is for an EEPROM. But if the EEPROM will fit in an otherwise unused area of the board, do you think that one input and one output is enough to drive it? What about two?

 

Regarding SARA chips, I think it only makes sense for F8/F6/F4. There are existing ROMs, protos and the like out there, and emulators support it already. If anyone needs a big board with RAM, they might as well use your 4A50 rather than a measly 128 bytes :)

 

Anyway, it's been 8 years since I've used board layout tools, so there's some relearning here (actually, I've forgotten a lot :)) But the free tool I downloaded the other day is not too bad so far (and there is an OSX version :lol:)

Link to comment
Anyway, it's been 8 years since I've used board layout tools, so there's some relearning here (actually, I've forgotten a lot :)) But the free tool I downloaded the other day is not too bad so far (and there is an OSX version :lol:)

If you are using Eagle CAD, I posted files a while back for the Chimera Jr. You should be able to take those eagle files and use some of the footprints. The main board is sized correctly with the center whole and will fit many types of shells. I would just send you the files, but I suffered a hard drive crash a few years ago and lost most of that work. I will see what I can find though.

 

Maybe check with CPUWiz, I sent him a copy board design. He may still have a copy.

 

Vern

Link to comment

I think I found them in an old PM. I cant attach files here for some reason, so I will just make a post in Hardware forums. They are for Eagle CAD. There should be a few different versions of the layout, including a design with fingers to activate the dust guard. Just delete those if you dont want them.

 

Vern

Link to comment
I think I found them in an old PM. I cant attach files here for some reason, so I will just make a post in Hardware forums.

You can't attach files in blog comments. Not sure why, but that's always been the case. You can, however, link to offsite files if you've got them on a server someplace.

Link to comment
I think I found them in an old PM. I cant attach files here for some reason, so I will just make a post in Hardware forums. They are for Eagle CAD. There should be a few different versions of the layout, including a design with fingers to activate the dust guard. Just delete those if you dont want them.

 

Vern

I'm also using Eagle, and that library file is exactly what I need! Thanks. Saves me the trouble of having to measure the board, and I couldn't find any libraries for the board edge connector and was hoping I wouldn't have to create my own.

Link to comment

Guest
Add a comment...

×   Pasted as rich text.   Paste as plain text instead

  Only 75 emoji are allowed.

×   Your link has been automatically embedded.   Display as a link instead

×   Your previous content has been restored.   Clear editor

×   You cannot paste images directly. Upload or insert images from URL.

Loading...
  • Recently Browsing   0 members

    • No registered users viewing this page.
×
×
  • Create New...