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Potential new hardware


foft

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Interesting. Same address ranges Hias saw:

"I checked and see a distinctive pattern: I get 3 blocks of 64 bytes

with a lot of memory errors, starting at (byte) addresses 0x20000,

0x40000 and 0x60000. And also 2 failing bytes at 0x55506 and 0x55507."

 

I actually use 0x00000 to 0x07fff (16-bit words) for the Atari base 64k. Outside this range!

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I was just doing some comparisons writing all 00s and all FFs to the SRAM and came up with both bits staying high or low, sometimes just one bit within a byte and sometimes more or none. Also, it's only in those three ranges, no issues outside of them. Other than it being within the ranges I'd listed, I don't see any other patters, so it's as though it's some sort of addressing issue unless it is just a bug in the old control panel. I wonder why they removed the SRAM functions from the new version.

 

Since the memory you're using is well outside the range where my tests have problems, I don't think it's the SRAM itself that is having issues with your code.

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I tried the spectrum core on my DE1 (where I replaced the SRAM) and it seems to work fine.

 

I don't know anything about speccies, but I managed to enter "print 42" and it printed "42" on the screen. So I guess it's OK :)

 

Now that we have 2 cores that fail with the EDBLL SRAMs I guess it would be a good idea to contact Terasic directly. Could anyone of you with a nonworking DE1 do that? It would be very interesting to hear what they tell about the issue.

 

so long,

 

Hias

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Terasic's reply:

 

The different SRAM chips on the board more likely have different specifications. There should be the specifications differe onto the DE1 board SRAM module that cannot run well with your apps which you mightbe not created exactly by following the SRAM's specifications. As what you mentioned in the email that there are some DE1 boards are having problems with the SRAM, could you provide us more about the source codes on the SRAM programming? We would like to help you to debug. Thank you.

Send us a simple one is workable.

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If you have a board with problematic sram try this version: experiment_201301119.sof

 

If you put sw7 up then it uses sdram. If you put sw7 down then it uses sram. There is no benefit in using sdram if your sram works (yet - in future there will be more memory available).

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Pleased it runs with SDRAM. Let me know how you get on - feel free to post some videos to youtube:-)

 

We'll have to create a simple SRAM example for terasic. I guess a counter that writes/reads each location should show the problem. I might not have time for that for a few weeks though.

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Now that it runs I need to add those connections to my serial port, thanks!

Unfortunately, at this point I know very little about this board, so I'd be very appreciative of an example to send them, but I can understand your schedule with a move and stuff. I think you mentioned a new job too?

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Is this a setting that could be controlled with a switch?

 

If this monitor works with the normal core it probably doesn't like my recent change to use composite sync on hsync even when scandoubled. This is for my development use since my new monitor only has composite sync.

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  • 2 weeks later...

I just got this reply from Digi-Key about my DE1.

 

Hi Mark,

 

Regarding your return of ###### from Invoice #########, our Product Manager has concluded that the product is defective, and will be returned to the manufacturer. Credit will be issued accordingly back to the credit card of purchase by the end of the week.

 

Please accept our apologies for the inconvenience.

 

Not sure what to do since my replacement board from Digi has the same issues and SRAM chips as the one the deemed as defective.

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