Jump to content
IGNORED

New 3DO RGB Mod Possibility.


Recommended Posts

So I have been thinking alot more about digital signals and looking up different ICs and I came across this:

http://www.mouser.com/pdfdocs/ADI_ADV7125_Datasheet.PDF

 

Just curious if its possible to use for the 3DO or is something anyone knows about.

 

The current 3DO RGB mod uses buffer>resistor ladders to get the analog signal.

This would be a much simpler RGB mod I think.

 

There probably also exists a chip for digital RGB to HDMI no ?

 

Any thoughts ?

 

For anyone confused this is what I would want to do:

oOy3o6U.jpg

Edited by the_crayon_king
  • Like 2
Link to comment
Share on other sites

  • 4 weeks later...

Have you had any progress on this? I would love to RGB Mod my FZ-10 to hook up to my PVM

I meant to post this:

https://easyeda.com/hotdog6394/3DO_RGB_ADV7125-1bfad1c801294c59bd414b17b93c6a99

I didn't finish it mostly because I dunno if it will work yet.

I left notes on the schematic I just have to do those things.

 

This woukd be for the 3DO consoles that have a certain chip check retrorgb.com

 

This kit will hopefully bypass having to use a bunch of resistors also I hope I don't need a TTL buffer.

Id really need to know the outputs voltage of that chips digital RGB

Edited by the_crayon_king
Link to comment
Share on other sites

  • 2 months later...
  • 4 weeks later...

I'll definitely be following your progress on this! Please keep us updated. My FZ-10 has the existing RGB mod in it (the one that OtakuStore used to sell) and I'd love to replace it with a better option. The old one is a relatively poor solution with a lot of video issues. Some people have washed out video and some have dark video (mine is very dark).

Link to comment
Share on other sites

I'll definitely be following your progress on this! Please keep us updated. My FZ-10 has the existing RGB mod in it (the one that OtakuStore used to sell) and I'd love to replace it with a better option. The old one is a relatively poor solution with a lot of video issues. Some people have washed out video and some have dark video (mine is very dark).

DeTGSF2.png

 

I think that will work.

 

May need 74HCT245 or a similar TTL buffer. I would be tempted to try it without those buffers first

It needs 2-5v for High and 0-0.8v for low for TTL on the ADV7125 but I do not know what the video input voltage is to the VP536ACG

The datasheet says 3v for High and 0.8 for Low so I would assume that it may work without a buffer.

Edited by the_crayon_king
Link to comment
Share on other sites

  • 4 weeks later...

Thanks a lot the_crayon_king!

 

I am very intrigued. Please keep us informed.

 

There are some test boards coming in a few days what I lack is the ADV7125 (need to find the correct footprint.

I have about 8 different boards for various consoles coming in. This one is lower priority.

I can send some of these out at cost for anyone who wants to give it a go.

 

I can't really guarantee it will work especially without a buffer.

Link to comment
Share on other sites

 

There are some test boards coming in a few days what I lack is the ADV7125 (need to find the correct footprint.

I have about 8 different boards for various consoles coming in. This one is lower priority.

I can send some of these out at cost for anyone who wants to give it a go.

 

I can't really guarantee it will work especially without a buffer.

 

I would definitely be willing to help trying out stuff.

My biggest disadvantage: I yet have to buy a 3do. Other than that I am in.

I have the proper tools, can solder SMD and can print PCBs (can have them printed^^). I even could implement small changes to the board files as long as they are saved in an “Eagle” compatible form. Otherwise wouldn’t be a problem too, as I could redraw the PCB based on the Gerber files.

I think it would take at least one month for me to get ready. Is that ok, or am I too slow/late?

Link to comment
Share on other sites

 

I would definitely be willing to help trying out stuff.

My biggest disadvantage: I yet have to buy a 3do. Other than that I am in.

I have the proper tools, can solder SMD and can print PCBs (can have them printed^^). I even could implement small changes to the board files as long as they are saved in an “Eagle” compatible form. Otherwise wouldn’t be a problem too, as I could redraw the PCB based on the Gerber files.

I think it would take at least one month for me to get ready. Is that ok, or am I too slow/late?

 

I ordered some boards but messed up with the blanking and have it tied incorrectly.

Kinda in over my head here. Need some input from an EE lol.

 

To do:

Add dedicated buffer for the clocking.

Strip Sync from luma with Lm1881.

Strip blanking from luma.

 

The ADV7125 blanks on logic low. I wonder if I could just tie luma to the blanking pin ?

The old design used some monostable trigger and inverter for sync and blanking but I don't know anything about it.

 

What I do know is sync is transmitted during the blanking period and that the logic of the ADV7125 is TTL.

So if we buffer the luma signal it should work for blanking ?

 

Luma out on the VP536A is:

0.31 - 1.023v (on)

0.0 - 0.309v (off)

 

TTL is:

0.0 - 0.8v (off)

2.0 - 5v (on)

-----------------------------------------

Need something that outputs a TTL logic 1 above a certain voltage in this case 0.31v

 

aVPIriM.png

Edited by the_crayon_king
Link to comment
Share on other sites

  • 3 weeks later...

Good to see this still being worked on. Will doing this mod help with the upscaler I'll end up getting sometime soon?

 

Its being worked on very laxly. I have no idea what the end result of this would be. But it should be as good as or better than the old design.

The last I noted of this would be it needs a way to strip blanking.

I have the Sync part handled with the LM1881.

I'd need something to trigger a logic 0 on less than 0.31V and a logic 1 on above 0.31V over luma.

 

Also needs a dedicated TTL buffer for the Clock input.

May also need TTL buffers for all of the RGB 0-7 inputs.

 

It would also possibly be simpler to build the old circuit and replace the Sync and Blanking on it. I would guess that is probably where a lot of issues were before.

x3 8bit TTL buffers to DAC ladder, lm1881, and maybe some kind of video amp so I could set proper 75 ohm impedance. Still dunno what to do about blanking but yea.

  • Like 1
Link to comment
Share on other sites

  • 2 weeks later...

Very interesting idea. A couple of points to add, if I may. U mention buffering for TTL, the data sheet says it is TTL compatible, it isn't a requirement though. The levels of the digital RGB, sync and blank should be fine without the need for extra circuitry.

 

The ADV7125 doesn't use a square pixel clk as far as I can see so using clk12i maybe out. U might needs a dedicated pixel clk, which would need buffering potentially.

 

Sync can be stripped from luma and either sent straight to to/ monitor or fed back into ADV7125. If sent back to chip, it will be put into Green signal as Sync on Green which may be undesirable for some TVs/ monitors. If sent direct to TV, it will be 2 clk cycles out from RGB due to a pipeline delay in the DAC. Not sure what effect this will have but is something to consider. If sync is used directly, Sync pin on ADV7125 needs to be tied to GND. Also the VP536 produces HS and VS separately do maybe it's possible to get RGBHV working on a VGA monitor?

 

Regarding blanking, again doesn't need to be TTL buffered. The LM1881 also strips Backporch from the video signal, this might be useable to provide blank level but I'm not sure. At this point some experimenting may be in order.

 

Finally, regarding the Analogue out lines, u have tied them to ground using 75ohm resistors I assume. U may also need 75ohm resistor and 220uF capacitors in serial with those lines, this could be incorporated at the pcb end or in the SCART connector if using SCART.

 

Hope this helps, I'm working on a 3DO at the moment with the BT910x chips so I may look at using one of your designs to experiment with. I'll let U know my findings.

Link to comment
Share on other sites

Very interesting idea. A couple of points to add, if I may. U mention buffering for TTL, the data sheet says it is TTL compatible, it isn't a requirement though. The levels of the digital RGB, sync and blank should be fine without the need for extra circuitry.

 

The ADV7125 doesn't use a square pixel clk as far as I can see so using clk12i maybe out. U might needs a dedicated pixel clk, which would need buffering potentially.

 

Sync can be stripped from luma and either sent straight to to/ monitor or fed back into ADV7125. If sent back to chip, it will be put into Green signal as Sync on Green which may be undesirable for some TVs/ monitors. If sent direct to TV, it will be 2 clk cycles out from RGB due to a pipeline delay in the DAC. Not sure what effect this will have but is something to consider. If sync is used directly, Sync pin on ADV7125 needs to be tied to GND. Also the VP536 produces HS and VS separately do maybe it's possible to get RGBHV working on a VGA monitor?

 

Regarding blanking, again doesn't need to be TTL buffered. The LM1881 also strips Backporch from the video signal, this might be useable to provide blank level but I'm not sure. At this point some experimenting may be in order.

 

Finally, regarding the Analogue out lines, u have tied them to ground using 75ohm resistors I assume. U may also need 75ohm resistor and 220uF capacitors in serial with those lines, this could be incorporated at the pcb end or in the SCART connector if using SCART.

 

Hope this helps, I'm working on a 3DO at the moment with the BT910x chips so I may look at using one of your designs to experiment with. I'll let U know my findings.

 

The board design/schematic is here and covers some of the things you bring up: https://easyeda.com/hotdog6394/3DO_RGB_ADV7125-1bfad1c801294c59bd414b17b93c6a99

Sync is between the back-porch and front-porch blanking being the front-porch/back-porch voltage level, I think..

Refer to :RS170A.jpg

 

75 ohms to ground on output. I usually add them and then do jumpers to set DC. Ill have to look more at that part.

The clock on the datasheet of the ADV7125 looks like its square wave also:

 

The CLOCK input of the ADV7125
is typically the pixel clock rate of the system. It is also known as the dot rate. The dot rate,and thus the required CLOCK frequency, is determined by the
on-screen resolution, according to the following equation:
Dot Rate= (Horiz Res) × (Vert Res) × (RefreshRate)/(Retrace Factor)
Edited by the_crayon_king
Link to comment
Share on other sites

My mistake. The pixel clk equation threw me off course. U are absolutely right, the pixel clk is that of the system, in this case the system is using a square pixel clk (14.75mhz PAL, 12.52mhz NTSE). So clk12i/o should be good to go and shouldn't require buffering. Square pixel refer to the pixel aspect ratio though, not the shape of the waveform.

 

Sometimes the blanking level is also referred to as the back porch (probably erroneously). It's voltage level should be the same and therefore may provide your blank level reference.

 

I've looked at your board designs, very nice. The data sheet recommends double terminating the Analogue outputs with a 75ohm resistor which I see u have done. It is also recommend with RGB to add a 75ohm resistor in serial along with a 220uF capacitor to maintain the 75ohm impedence and filter unwanted DC signals.

Link to comment
Share on other sites

  • 2 months later...

My mistake. The pixel clk equation threw me off course. U are absolutely right, the pixel clk is that of the system, in this case the system is using a square pixel clk (14.75mhz PAL, 12.52mhz NTSE). So clk12i/o should be good to go and shouldn't require buffering. Square pixel refer to the pixel aspect ratio though, not the shape of the waveform.

 

Sometimes the blanking level is also referred to as the back porch (probably erroneously). It's voltage level should be the same and therefore may provide your blank level reference.

 

I've looked at your board designs, very nice. The data sheet recommends double terminating the Analogue outputs with a 75ohm resistor which I see u have done. It is also recommend with RGB to add a 75ohm resistor in serial along with a 220uF capacitor to maintain the 75ohm impedence and filter unwanted DC signals.

 

I amended the schematic per your advice. : https://easyeda.com/hotdog6394/3DO_RGB_ADV7125-1bfad1c801294c59bd414b17b93c6a99

This is/will be CC-BY-SA. As in it can be used for commercial purposes (by anyone). So feel free to use this. (really close to the stock datasheet for the ADV7125 anyway)

I'm still unclear about the blanking wouldn't the time it remains at that voltage level be relevant ?

 

The lm1881 datasheet says this:

 

the chroma burst is located on the back porch of the horizontal blanking period.This period, approximately
4.8 μs long, is also the black level reference for the subsequent video scan line.

 

At any rate ill remake the board design next time at a PC with a mouse. Should have a usable product from it.

 

It should be mentioned that I ran across a RGB modified FZ-10 with a PCB about the size of the one Id have used.

It had been encased with blue hotglue but had something about the size of a ADV7125.

 

Any word on what the heck that was ? Cause it certainly isnt a buffer/dac ladder thing (comparable to the otaku 3DO RGB)

Edited by the_crayon_king
Link to comment
Share on other sites

Glad you are making progress with this :-) Yeah I'm not sure about Blank either. Like you said, the timing could be off by using the Back Porch signal. I've noticed that the BT9101 and BT9103 both use Blank signal. I will try and trace my BT903 Blank pin to the CLIO chip. Hopefully the same pin on VA536 motherboards will provide an active Blank signal.

 

Do you have a picture of the RGB mod chip you found? It sounds like they might have used a BU3616K chip which is about the same size as the ADV1725 but simpler in design and application.

Link to comment
Share on other sites

Glad you are making progress with this :-) Yeah I'm not sure about Blank either. Like you said, the timing could be off by using the Back Porch signal. I've noticed that the BT9101 and BT9103 both use Blank signal. I will try and trace my BT903 Blank pin to the CLIO chip. Hopefully the same pin on VA536 motherboards will provide an active Blank signal.

 

Do you have a picture of the RGB mod chip you found? It sounds like they might have used a BU3616K chip which is about the same size as the ADV1725 but simpler in design and application.

I have a PDF of the pinouts for the VPA536, blanking and sync is mixed internally. The only output being H/V sync. Blanking being applied to Luma and Composite out. That's why I was thinking of stripping blanking from there. But the back porch should suffice.

 

No I don't have a picture. It had to be something on the lines of 24 bit dac with lm1881 im certain of that.

 

So reading this: http://www.edaboard.com/thread139994.html

makes me think this design will work as is.

 

I'm not even sure blanking is a relevant thing on newer CRTS with sync present and I am almost certain blanking isn't needed for LCD TVs.

 

I suppose using any 24 bit, 3 channel video DAC with a lm1881 combo is certain to lead to success. The ADV7125 was just more readily available.

Or even using 3x 8 bit video DACs.

 

I am probably going to do two solder jumpers here. One to lock blank to the lm1881 back porch and one to lock blank high (as in no blanking). I'd think it would be good to do the same on any similar designs you come up with. The lm1881 also puts out Vsync. I think you can use Csync (as Hsync) and Vsync as is to put out to VGA although I am not certain about that.

 

Let me rebuild this board for hopefully the last time.

 

 

Just occurred to me I never had the LQFP-48 package size for the ADV7125 even correctly ported.

Edited by the_crayon_king
Link to comment
Share on other sites

I have a PDF of the pinouts for the VPA536, blanking and sync is mixed internally. The only output being H/V sync. Blanking being applied to Luma and Composite out. That's why I was thinking of stripping blanking from there. But the back porch should suffice.

 

The VA536 produces its own Blank signal but the other 3DO encoders get it from the CLIO chip. My theory was that as long as the pinout of the CLIO was unchanged and the Blank signal was still produced (though not required), you could wire Blank from the CLIO. But it looks like you have solved that problem anyway :-)

 

I had the same thought About HV sync with my design. I've kept pins for both CSYNC and Vsync so I could test VGA compatibility. But I think most modern PC monitors only accept 480p signals and above. Older monitors accept 240p I think.

 

I had to edit Eagle foot prints as the BU3616k wasn't listed. Assigning all 48 pins was a ball ache. Good luck with your prototype, very interested to see how it turns out.

Link to comment
Share on other sites

The VA536 produces its own Blank signal but the other 3DO encoders get it from the CLIO chip. My theory was that as long as the pinout of the CLIO was unchanged and the Blank signal was still produced (though not required), you could wire Blank from the CLIO. But it looks like you have solved that problem anyway :-)

 

I had the same thought About HV sync with my design. I've kept pins for both CSYNC and Vsync so I could test VGA compatibility. But I think most modern PC monitors only accept 480p signals and above. Older monitors accept 240p I think.

 

I had to edit Eagle foot prints as the BU3616k wasn't listed. Assigning all 48 pins was a ball ache. Good luck with your prototype, very interested to see how it turns out.

 

Ive had to do similar manual porting with 128 pin things. Not fun.

Well the design is 90% done. I just try to get rid of as many trough holes as possible. At least two of those capacitors are probably not needed.

Going to make it more efficient and change around the silkscreen but this SHOULD function.

 

M6Hkkxh.png

Edited by the_crayon_king
Link to comment
Share on other sites

Looks good. Here's my BU3616K design

 

post-61381-0-75472100-1506354750.png post-61381-0-09797700-1506354793.png

 

I have left out the 75Ohm + 220uf from the circuit to keep it smaller and cheaper. I was going to put them in the SCART socket but I may add them back to the pcb after seeing your design. I have also wired CLK and SYNC away from the RGB to avoid interference. I have kept the LM1881 circuit simple with just a 0.1uf cap and 75 Ohm termination resistor on Sync in. The LM1881 circuit that you have used is the full circuit but I haven't heard of any sync issues so I have kept it smaller and cheaper. This is just a proto design and I will probably modify it after testing and troubleshooting.

Link to comment
Share on other sites

Looks good. Here's my BU3616K design

 

attachicon.gifIMG_2064.PNG attachicon.gifIMG_2065.PNG

 

I have left out the 75Ohm + 220uf from the circuit to keep it smaller and cheaper. I was going to put them in the SCART socket but I may add them back to the pcb after seeing your design. I have also wired CLK and SYNC away from the RGB to avoid interference. I have kept the LM1881 circuit simple with just a 0.1uf cap and 75 Ohm termination resistor on Sync in. The LM1881 circuit that you have used is the full circuit but I haven't heard of any sync issues so I have kept it smaller and cheaper. This is just a proto design and I will probably modify it after testing and troubleshooting.

 

Looks good. Getting everything on one side is a nice accomplishment.

I am feeling pretty optimistic about at least one of these being a replacement for the Otaku store kit.

 

So pick whatever your output is going to be such as 8pin mini din or whatever and just build everything to pair to what is typically inside the cable.

Im also using this: https://easyeda.com/hotdog6394/490_MD_80SV_breakout-d34cb936748241e8ad10150986ee9ab2

So my kit will include MD 80SV as well as that breakout. That breakout is also free to be used in any fashion.

 

8 pin din is also a consideration.

 

Id move C5 and C6 another mm or so away from your board unless you are comfortable soldering that close to the IC. If you do end up adding the 75ohm and 220uf caps I think the way I have it is probably as efficient as possible.

Edited by the_crayon_king
Link to comment
Share on other sites

Thank you for your comments. I realised I had placed C5 and C6 were too close to the IC, if I keep them in the final design, I will move them to a better position. They are extra power decoupling caps so they may not be needed. If I do move the filter caps and resistors back to the pcb, I will use your design as it's the best layout. That's interesting using the MD-80SV. I was going to use a C shape 8 pin din panel mount as these are the easiest to acquire. The only issue was finding good quality SCART cables with a 8 pin din connector for a good price.

 

I plan to release my design as open source for people to use as an alternative to the old DAC ladder design. I would of course give credit to your design as it has been very informative and helpful in my own research. I originally reviewed 6 different 8bit triple dacs and found the ADV7125 and BU3616K to be the best choices, with the ADV7125 being more high end. I have potentially deciphered the other 3DO encoders so your design should be fine to work across all 3DO https://assemblergames.com/threads/240p-output-on-3do-with-bt9103-encoder.66295/

 

I look forward to seeing how well your design works. :-)

Link to comment
Share on other sites

Join the conversation

You can post now and register later. If you have an account, sign in now to post with your account.
Note: Your post will require moderator approval before it will be visible.

Guest
Reply to this topic...

×   Pasted as rich text.   Paste as plain text instead

  Only 75 emoji are allowed.

×   Your link has been automatically embedded.   Display as a link instead

×   Your previous content has been restored.   Clear editor

×   You cannot paste images directly. Upload or insert images from URL.

Loading...
  • Recently Browsing   0 members

    • No registered users viewing this page.
×
×
  • Create New...