I've got AN0-AN2 going through a buffer and resistor ladder so I can view the goings on with my 'scope.
Towards the end of a scanline, Antic sends the HBlank code. It "pre-empts" what it thinks is going to be happening on the next scanline if it's the last scanline of a DList instruction. ie - it will be sending "011 - HBlank and set 40 column mode" if the current line was hires, otherwise it will be sending "010 - HBlank and clear 40 column mode".
In the case where a hires mode is either pending or ending, the HBlank code is corrected shortly afterwards. ie, it will transition to the other value. This occurs once the next Display List Instruction has been fetched - delay after fetch unknown, although the correction does seem to occur at about a quarter the duration of the total HBlank command.
At scanline 240, the "010 - HBlank and clear 40 column mode" command is sent continuously until VSync is due, except when we have the "Scanline 240 bug" in effect.
This would indicate that GTIA has some "autonomy" in that it will generate HSync pulses at their correct intervals without further prompting from Antic. One exploit of this behaviour - by toggling DMACTL betwen No Display and a display mode and back, you can force extra HSync pulses or delay upcoming ones.
It is even possible on PAL machines to upset the colourburst phase alternation such that the TV will show the wrong colours.
In such case as the 240-bug is in effect, the HBlank and set 40 column mode is sent.
Additional to this... unlike normal display lines, no "000 - Blank" code is sent in this area. In the course of a normal display, the 000-Blank code is sent in the interim period before and after the normal display part of a scanline... it's duration of course is dependant on what DMA Width is in effect.
During the "display" period of a >240 line when the bug is in effect, code "111" is constantly output during the horizontal portion of the display for the duration dictated by whatever DMA screen Width is in effect.
Folded "curtain effect": This is most likely due to the train of HSync pulses suddenly being put out of step. When the 240-bug comes into effect, the HBlank code is sent earlier to GTIA. As such, we have a short scanline near the bottom of the display (on PAL at least).
Unless overriding action is taken, this out of step behaviour persists until the next field (ie a Display List instruction is fetched and the new display starts).
Due to this effect, parts of the next field are also often warped. The warped effect is usually worst in narrow DMA mode, followed by normal and wide.
Of course, narrow suffers in that the HBlank command will be sent incorrectly while the scanline is only around 2/3rds finished.
VSync: In normal operation, the "010 HSync and Clear 40 column" command is continually output during the offscreen period, except for the 3 scanlines of VSync, when code "001 VSync" is sent.
If the 240-bug is in effect, Antic will behave as in other offscreen scanlines for the 3 VSync lines, except outputting "001 VSync" during the parts of the scanline which would be considered non-display as dictated by DMACTL, and outputting "111" otherwise.
Edited by Rybags, Fri Mar 20, 2009 9:22 AM.