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f18a fpga vdp 9918a 9928 video hardware mods upgrade updates

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#551 --- Ω --- OFFLINE  

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Posted Tue Mar 14, 2017 10:22 AM

The issue about the nanoPEB - F18A compatibility makes me wonder: Is it possible for a device on the side port to write to VDP RAM directly, bypassing the CPU?

 

 

What a concept!  If possible, that would open up some amazing things.



#552 matthew180 OFFLINE  

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Posted Tue Mar 14, 2017 11:49 AM

Since the #HOLD pin on the 9900 is pulled high in 99/4A (yet another way the 99/4A was crippled), the only way to address the VDP directly would be to override the CPU's address / data bus.  I don't recommend doing that.  It might be possible to issue an IDLE statement though to get access to the address / data bus.  However the 9900 datasheet is not clear about the state of the buses when the "external instructions" are issued, other than to say the three most significant address bits (A0, A1, A2) are set to predefined levels related to the external instruction being executed.

 

Well, I just looked at the schematics and it is all moot.  The address bus is buffered before going to the side port, so you will never be able to drive the address bus.  Also, the VDP's #CSR and #CSW are not available on the side port.

 

An alternative would be to have a second VDP as a peripheral, so you could have a dual-monitor 99/4A.



#553 speccery OFFLINE  

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Posted Tue Mar 14, 2017 1:52 PM

 

An alternative would be to have a second VDP as a peripheral, so you could have a dual-monitor 99/4A.

 

 

A quick question: are the fast memory accesses on the TI's 16-bit internal bus reflected on the external bus? I should know since I've done some logic analyzer captures, but I don't remember right now. I guess what I am really asking is that if you had a write-only VDP on the external bus, could it be made to mirror the picture created by the internal VDP? Not exactly sure what would be the use case there... For a dual-monitor setup it would be nice to run a debugger on the other screen, either for Basic or machine code.



#554 mizapf OFFLINE  

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Posted Tue Mar 14, 2017 1:57 PM

No, all accesses outside of 0000-1FFF and 8000-83FF trigger the wait state circuitry.

 

[Edit: The address bus drivers at the I/O port are always on, so when you access these areas you may "see" the fast operations by their addresses outside, but probably not the data bus. Need to check.]


Edited by mizapf, Tue Mar 14, 2017 2:13 PM.


#555 Willsy OFFLINE  

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Posted Tue Mar 14, 2017 3:44 PM

In addition, the data bus on the expansion port is only 8 bits wide.

#556 mizapf OFFLINE  

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Posted Tue Mar 14, 2017 4:36 PM

Yes, but it could be that during internal accesses, one of the bytes (MSB or LSB) may become visible on the outgoing data bus. However, just had a look at the schematics, the data bus is fully controlled by the wait state logic, and when this circuitry is not triggered, there will be no signals for opening the data bus drivers. So I guess the data bus is floating during internal accesses.



#557 Willsy OFFLINE  

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Posted Wed Mar 15, 2017 8:08 AM

Yes. I don't have the schematics but I think the expansion bus is tri-stated when not in use.

#558 BJGuillot OFFLINE  

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Posted Sun Mar 26, 2017 5:32 PM

So... I finally got up courage to try to update my F18A and it seems to have failed.

 

Current rev is 1.5, trying to bump it to 1.8.

 

It seemed to start out OK, but then got stuck in the same spot for about 5 minutes (see attached picture).  I pressed space bar to see what would happen and the TI reset back to the title screen.

 

An update to my saga from a few weeks back in trying to use the F18A updater with dsk files mounted into my NanoPEB...

 

After reading some of the comments about there being a special ROM available for the NanoPEB that makes it more compatible with the F18A, I reached out to the NanoPEB creator, and he sent me some few chips that updated my existing NanoPEB to the F18A-compatible version.  It was just a pop-up chip out, pop new chip-in.

 

Unfortunately, the new chips in my NanoPEB didn't seem to make any difference.  The F18A Updater would still fail in random places with CRC errors when reading the various portions of the update off disk.  He said the update only changed the timings in the boot-up sequence, so I was skeptical if it would have made a difference in any case.

 

Fast forward to today, and I saw the new thread: http://atariage.com/...-based-updater/

in which Tursi released a new ROM-based F18A Updater.

 

I never programmed a ROM before--I bought all the equipment to be able to do it last year or so, but never got around to doing anything with it.  Well, now I had a good reason to learn.  So I flashed a chip in the UberGROM I had sitting around, and after some help from Omega, my second attempt was successful at getting the ROM-based F18A Updater to work.  So happy ending: My F18A has been upgraded from the 1.5 code to 1.8.



#559 --- Ω --- OFFLINE  

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Posted Sun Mar 26, 2017 6:00 PM

You were using version 1.5?  :-o 

Congratulations on the completed upgrade!



#560 Tursi ONLINE  

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Posted Sun Mar 26, 2017 8:29 PM

I was using 1.5 before I did the upgrader too ;)

 

Glad it worked for you, BJGuillot! That does suggest a problem with your CF device. People have pretty mixed results with them, unfortunately.



#561 matthew180 OFFLINE  

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Posted Mon Mar 27, 2017 2:10 PM

V1.5 was probably the largest distribution of boards, so I suspect most people will be on 1.5 if they have never updated.  Thanks Tursi for making the ROM-based updater and for porting it to the CV!  It it already making people's lives better. :-)



#562 digress OFFLINE  

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Posted Tue Mar 28, 2017 7:16 AM

great job providing the updater. That solves a problem I was running into with some testers that were on the older version.

 

I have a question. During a scrolling sequence in my game everything works great but every once in a while the screen goes completely black on tile layer 2 except for the top score line which is updated manually every few cycles. Now the game continues as normal and when you die the screen is reintitialized and everything is back to normal. I put in  a button you can press to essetially clear your window sheild and reset the tile layer2 if it happens so you don't have to die but I need to remove the bug .

 

I'm not sure why it's happeneing yet though. it seems the colour pallette for the transparent tile has become corrupt during gameplay.







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