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Later Mikey Revisions and NMI


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#1 TailChao OFFLINE  

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Posted Sun Nov 17, 2013 3:44 PM

I was restoring /NMI support on my Lynxes for debug use and came across something peculiar with the Lynx II-

 

If we look at the C104129-001 Rev. 2 board (the odd duck which has the Lynx I style VLSI chips and PLCC DRAMs), /NMI is still there on Mikey.

VLSI89_Mikey.jpg

It's tied high just like in the Lynx I. We can just cut the trace and attach a secret switch. No problem.

 

But looking at the other Lynx II revisions:

New90_Mikey.jpg

The pin has been reassigned for a LCD control. This also explains the LCD incompatibility that LX.NET found some time ago.



#2 karri OFFLINE  

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Posted Sun Nov 17, 2013 10:48 PM

Great find. This is news for me.



#3 LX.NET OFFLINE  

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Posted Mon Nov 18, 2013 3:48 PM

This is really cool stuff.

I am particularly interested in the debug things you are doing. Still unable to acquire a Howard board, I am trying to do and figure out some low level things (like ComLynx and timers) that might be easier when I could do debugging on the console.

 

Can you expand a little on what you have done with the /NMI pin?



#4 Lynxman OFFLINE  

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Posted Mon Nov 18, 2013 3:58 PM

OK, now i have to sort my Displays and Boards in stock again... ;-)

#5 TailChao OFFLINE  

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Posted Mon Nov 18, 2013 10:05 PM

This is really cool stuff.

I am particularly interested in the debug things you are doing. Still unable to acquire a Howard board, I am trying to do and figure out some low level things (like ComLynx and timers) that might be easier when I could do debugging on the console.

 

Can you expand a little on what you have done with the /NMI pin?

 

I think you're overestimating what's going on. I just attached the NMI line to a button so I can use the stage/scene select in my current project at any time.

LazyButton.jpg

It isn't even debounced.

 

Of course, you can attach it to anything you want such as a microcontroller. The Howard board has a large amount of support hardware in order to get features like a memory viewer and single stepping. The former is simple, and the latter could be done by toggling NMI every 4MHz tick and then doing the grunt tracing work in your handler. The problem is that NMI only gets you an interrupt of higher priority than the timers and comlynx. They're still running in the background.

 

If you're trying to study the hardware behavior for reverse engineering it is probably more useful to drive the system clock using an FPGA since it's CMOS and should be able to operate super-slow.

 

 

What I think is more interesting is that this C104129-001 Rev. 2 board appears to be the earliest type of Lynx II. One that features monophonic sound as well.



#6 GadgetUK OFFLINE  

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Posted Tue Dec 3, 2013 4:01 PM

Very interesting stuff! Any idea what that LCD control line does?

#7 TailChao OFFLINE  

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Posted Thu Dec 5, 2013 7:14 PM

Very interesting stuff! Any idea what that LCD control line does?

Now that I checked, things got more interesting:
Mikey1990_Pins13_25.jpg

 

Top is Mikey Pin 13 ("CLK1"), this controls the pixel clocking for the first 1/3 of the LCD. (Please excuse the round edges, my scope needs repair).

Bottom is MIkey Pin 25 (Used to be NMI on Rev2), which is now CLK1n. Seems they no longer generate it in the inverter nearby.

 

Seems many pins have actually moved around. CLK2 and CLK3 have been shifted down to Pin 12 and 13.

However, it seems the pixel clocking setup for the LCD is exactly the same on both revisions (and the pins are in the same place). So the fact that the panels are not interchangeable between units with Mikey Rev2 and the 1990/Stereo revision is due to some other timing and not the actual Pixel/HBL/VBL setup.



#8 GadgetUK OFFLINE  

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Posted Sat Dec 14, 2013 3:19 AM

Its getting even more interesting!  I guess we will discover more as Candle progresses with the LCD replacement.



#9 TailChao OFFLINE  

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Posted Sat Dec 14, 2013 12:48 PM

Its getting even more interesting!  I guess we will discover more as Candle progresses with the LCD replacement.

I am not sure why because all of the signals pertaining to sending pixel data to the LCD panel are identical for all Lynx revisions.

 

The incompatibility between the very early monophonic Lynx II units and the later ones likely pertains to the extra bais/clock lines supplied to the panel. While the differential clocks, pixel data, VBL, and HBL pins may have moved on Mikey they are in the exact same place on the LCD ribbon connector on all units (aside fromt the Lynx I which obviously has no ribbon connector). I cannot see any timing differences either.

 

Essentially- the panel incompatibility between the early and later Lynx II revisions should not affect a pixel grabber attached to the unit. At least, it certainly does not affect the one I have been working on and I doubt it will make any difference for Candle's either.

 

Edit: Adding my LCD notes below for more clarity:

---------------------------------------- --- -- -
 2) LCD Screen
---------------------------------------- --- -- -
 Ribbon Pinout
----------------- --- -- -
The original (skateboard sized) Lynx has its LCD directly
soldered to the mainboard. However, the later revisions
use a 26-Pin ribbon connector.

	 Pin#	Description
	 ---	-----------
	 1,2 :	+5V
	 3-8 :  Magic LCD Timing Signals
		     Several clocks of varying frequency and
		   amplitude. While these are important for
		   controlling the LCD, they're not very useful
		   for extracting pixel data.
	   9 :	HBL
		     Idles low, rising edge signifies the end of
		   the current line.
	  10 :	???
	  11 :	Pixel Clock A	(Idles HIGH)
	  12 :	Pixel Clock An	(Idles LOW)
	  13 :	Pixel Clock B
	  14 :	Pixel Clock Bn
	  15 :	Pixel Clock C
	  16 :	Pixel Clock Cn
		     These differential clocks toggle when the
		   Pixel Data pins should be latched (DDR). The
		   three pairs correspond to the three drawing
		   columns of the LCD (see TIMING section).
	  17 :	Pixel Data 1
	  18 :	Pixel Data 3
	  19 :	Pixel Data 0
	  20 :	Pixel Data 2
	  21 :	LCD Resetn / VBLn
		     Lowers at the beginning of vertical blank,
		   the exact timing of this depends upon the
		   LCD configuration (see TIMING section).
	22-24:	Contrast Adjustment Specials
		     These vary with the state of the contrast knob.
	   25:	???
	   26:	Ground

Note that there is a difference in this interface depending
upon the revision of MIKEY. BUT- it seems to only pertain to the
magic LCD timing signals and not to the actual pixel clocking.

 Pixel Timing
----------------- --- -- -
The Lynx's 160x102 display is a bit of an oddity when compared to
other portable consoles of its era- the LCD timing is programmable.
HBL and VBL frequencies are chosen by two of the eight system
timers (Timer 0 for HBL and 2 for VBL). Therefore many games will
use whatever refresh rate is convenient for them.

Sending data to the LCD panel itself is also quite interesting,
the screen is divided into three 160-triad (RGB element) wide
columns as shown below:

		-------------------------
		|       |       |       |
		|       |       |       |
		|   A   |   B   |   C   |
		|       |       |       |
		|       |       |       |
		-------------------------

Pixel data is latched in a given column when its differential
clock toggles (so a toggle on pins 11 and 12 would latch a pixel
in Column A). A total of three latches are required to fill an
entire pixel's worth of RGB data (4-Bits per latch, 12-Bit color).

Color order is identical to that of the triads on the LCD panel:
Red is latched first, then green, and finally blue.

Note that no overlap is present in the three column clocks. They
will always perform their 480 toggles in order ever line. First A,
then B, and finally C. Some delay is present after the final column
has finished before the next line begins.


The start of a line may be determined by the rising edge of
Pin 9 (HBL). A total of 105 lines are sent each frame, the first
three of which should be ignored (vertical blank).

Pin 21 will lower at the beginning of VBL, but only after the display
has been initialized by the game software. So the startup screen
displayed during the decyrption process will have no proper vertical
blank generation. This still works since the LCD will wrap around afer
105 lines worth of data.

Edited by TailChao, Sat Dec 14, 2013 1:06 PM.


#10 LX.NET OFFLINE  

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Posted Sat Dec 14, 2013 1:56 PM

For emulation it is rather interesting/important to know whether the first three lines after VBL or the last three before VBL are the blank lines. You mentioned that it are the first three. Just checking if you can confirm which one it is.



#11 TailChao OFFLINE  

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Posted Sat Dec 14, 2013 2:01 PM

For emulation it is rather interesting/important to know whether the first three lines after VBL or the last three before VBL are the blank lines. You mentioned that it are the first three. Just checking if you can confirm which one it is.

First three, which is also why you have to offset your horizontal blanking effects by three lines.






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