130XE and ANTIC cycle stealing

[mariuszw]

Hi all,

 

If I set ANTIC and CPU to read from different banks on 130XE (CPU: standard banks, ANTIC extended bank and Display List with Display data in extended memory), will ANTIC stop stealing CPU cycles for display?

 

If yes, how do I detect 130XE (or computer with memory extension compatible to 130XE)?

 

Mariusz.

[Rybags]

Antic cycle steals via graphics access or memory refresh will halt the CPU no matter where they're directed to.

 

Our machine isn't like the Amiga - it has various names for it's Ram depending on how they can be accessed and the affect on the CPU. ie - Chip Ram can be seen by the chipset and if the CPU accesses it will be subject to likely slowdown. Fast Ram is exclusive to the CPU and won't incur slowdowns.

 

Even modern Ram expansion or replacements using Static Ram which requires no refresh cycles gives no speedup. Antic knows nothing of what type of Ram is installed so performs it's refresh regardless.

 

You can't set the CPU and Antic to read from different expanded banks. You select one expanded bank which either one or both can see, if you opt out for one or the other accessing expanded Ram then it just accesses main Ram.

 

Detecting 130XE - you can detect 128K or more Ram but that's not guarantee it's a 130XE since other machines can be expanded to work like a 130XE. Though some other expansion types don't allow seperate CPU and Antic access, they direct both to the selected bank.

 

Generally you can detect >64K Ram by just trying to select a different bank for the CPU to see, after first putting in a sequence of bytes somewhere in the $4000-$7FFF range. Change to another bank and if your string isn't there it means you have >64K.

[mariuszw]

Antic cycle steals via graphics access or memory refresh will halt the CPU no matter where they're directed to.

 

Our machine isn't like the Amiga - it has various names for it's Ram depending on how they can be accessed and the affect on the CPU. ie - Chip Ram can be seen by the chipset and if the CPU accesses it will be subject to likely slowdown. Fast Ram is exclusive to the CPU and won't incur slowdowns.

 

Even modern Ram expansion or replacements using Static Ram which requires no refresh cycles gives no speedup. Antic knows nothing of what type of Ram is installed so performs it's refresh regardless.

 

You can't set the CPU and Antic to read from different expanded banks. You select one expanded bank which either one or both can see, if you opt out for one or the other accessing expanded Ram then it just accesses main Ram.

 

Detecting 130XE - you can detect 128K or more Ram but that's not guarantee it's a 130XE since other machines can be expanded to work like a 130XE. Though some other expansion types don't allow seperate CPU and Antic access, they direct both to the selected bank.

 

Generally you can detect >64K Ram by just trying to select a different bank for the CPU to see, after first putting in a sequence of bytes somewhere in the $4000-$7FFF range. Change to another bank and if your string isn't there it means you have >64K.

 

Thanks for explanation. No doubt Antic must refresh memory, that's out of question. I was wondering if Antic stops stealing CPU cycles for playfield DMA, PMG DMA and Display List DMA actually. But according to your description, that doesn't happen either

 

BTW: I wonder why ANTIC designers didn't take advantage of the fact that 6502 is accessing its memory bus every other cycle, leaving memory bus free for 50% of time.

[Xuel]

The 6502 accesses the bus every cycle, not every other cycle. That's why HALT was added, so that ANTIC can steal some cycles for DMA.

 

Maybe you're thinking of the C64 where the RAM is clocked at 2MHz and half of the cycles are for the 6502 at 1MHz and the other half are for the VIC at 1MHz?

 

EDIT: Caveat on C64 is that VIC can also grab some of the 6502's cycles on badlines, so it's getting nearly 2Mhz bandwidth sometimes.

Edited April 18, 2016 by Xuel

[mariuszw]

I am not an hardware expert, so I can't tell for sure. I took info about bus being accessed every other cycle from here: http://www.cpushack.com/CPU/cpu1.html(actually in 6809 section).

[foft]

It would be possible to build an antic cache to sit between antic and the board so it wouldn't need to halt the cpu. Trouble is, it'd break a lot of stuff!

[+JAC!]

>If yes, how do I detect 130XE (or computer with memory extension compatible to 130XE)?

You can using the PM collision registers to do that. Put zeros in the normal bank and $FF on the XRAM bank, then set PMBASE to $40 and HPOS to $80 or so.
Put some graphics there, too then check if GTIA detects a collision between PM and playfield.

Only takes one frame and you can just set all colors to black, so nobody will notice.

 

While this is possible, you should consider coding in a way that does not rely on separate CPU/ANTIC access. Everything else will limit your customer base.

[+CharlieChaplin]

While this is possible, you should consider coding in a way that does not rely on separate CPU/ANTIC access. Everything else will limit your customer base.

 

Fully agree here...

[Rybags]

The cache idea - it's been suggested before. If using SRam then in theory you could have some mirrored memory system then replicate writes to both and serve reads seperately without need to halt the CPU.

But you'd end up with something that's probably as costly as a Ram expansion + accelerated CPU anyway and programs to take advantage of it probably wouldn't work on normal machines.

Edited April 19, 2016 by Rybags