Practical steps for using PORTB extended RAM

[morelenmir]

Hello morelenmir

 

My XEGS does it with 1MB of extended memory. Read all about it in an article from 2001.

 

If I'ld do it all over, I'ld use SRAM instead of DRAM. SRAM wasn't available (or not at reasonable prices/sizes) back then. SRAM would make the design a lot easier.

 

Sincerely

 

Mathy

 

Many thanks Mathy!!! I will give that a read with great interest. Woah.... That was way back in 2001!!! That makes me feel incredibly old!!!

 

I would love it if the Ultimate1MB had done the 1088kb mode as COMPY and not RAMBO. Even though I've now got one of these attached and working very nicely, whenever I read a how-to on building a mod from scratch like your project here or Hias' 'Freezer 2011' I just cannot help myself but become enthused to give them a try!!! Would you ever consider giving your design another look, given the ready availability of cheap SRAM these days? I would love to see 1mb COMPY - and after my experience with the SRAM v1.3 I dare say 1mb COMPY with battery-backup would be a reasonable step too!!! That last feature is something I think the U1MB really misses - although of course there is a very small piece of RAM made non-volatile by the battery, but that is mainly for BIOS settings and saving the current time I believe. Certainly the main body of the expanded memory has nothing to keep it intact between usage cycles.

 

Newell and wizztronics come to mind but the wizz is just a copy of the Rambo so

no wonder it doesn't do ANTIC access either. Main reason as I can gather it

is because on the XL where these upgrades were aimed for there is no 2nd PAL

chip to do the 4 modes of ANTIC access with to then claim 130XE compatibility.

And not sure on the time line of these offerings but it could have been the

case where the 130XE 'standard' had not been revealed because they hadn't

shipped yet.

 

Retro fitting one of the add to memory type, such as the

newell to an XE might be done thru the 2nd PAL chip doing 4 mode

ANTIC access and actually have it work there. But without that chip or

an equivalent gob of glue logic doing that, it's not ever going to happen

on an XL. So in the why they didn't, is the issue where they didn't know

they were supposed to and after that then they really didn't know how

as well. Newell claims to be ANTIC access with an inverter trick, but

I suspicion it takes a whole lot more than just that. I read in the

Rambo manual where they claim 130XE compatibility but turn right around

and say it doesn't do ANTIC access -- so which is it? Newell and Rambo

are trying to redefine the word 'if' for us is what it amounts too.

 

Short answer is, it's hard to come by.

 

A fascinating analysis 1050! I think that we are all 'standing on the shoulders of giants' as it were, if not in a few cases of the forum members here being the giants themselves!!! Things that seem self-evident these days were still quite obscure when the RAMBO and the Newell devices were being put together. The machine is now so well known and thoroughly dissected that chaps like Lotharek and Candle and Hias have a very clear picture of what is possible and what is not given the base hardware. Of course, I must make it absolutely clear that I do not for one second say any of the amazing mods we have access to now were 'easy' to build or 'trivial' to get working. It still takes that vital spark of inspiration and many years of electronic engineering experience to make something like the U1MB or the Rapidus.

 

Broadening that topic a little bit, I must say that I always feel a little like a cheat when I just assemble a design which some other, genuine genius has thought up and tested beforehand! I suppose on my end there is some degree of skill to claim in being able to solder and lay out a circuit well enough for it to run, but... Still, I cannot begin to imagine the depth of confidence and true understanding it must require to actually conjure these devices from the mind and set them down on paper and copper. Maybe one day!

Edited September 22, 2016 by morelenmir

[ClausB]

So in the why they didn't, is the issue where they didn't know

they were supposed to and after that then they really didn't know how

as well.

 

No, not so. I knew exactly what I was doing when designing the 256K expansion that eventually became RAMbo. I intentionally ignored separate ANTIC access for these reasons:

 

1 - I needed 5 PORTB bits and 3 were already used by the XL, so there was no room for ANTIC Bank Enable.

2 - I wanted to minimize the expansion circuit so it would be easier to build.

3 - There was no software that supported separate ANTIC access and I thought it unlikely there would be much, because it would only run on a 130XE and not on the millions of earlier Ataris.

 

My 1985 instructions stated clearly the extent of 130XE compatibility:

 

"I have designed a new upgrade for the 800XL that implements such a

scheme. Its similarity to the 130XE's scheme allows use of software for the

XE on a 256K 800XL.

 

To select one of four banks, the XE uses two bits, #2 and #3, in the

memory control register (port B of the 6520 PIA, addressed at $D301 or 54017

decimal). Zeroing bit #4 makes the selected bank appear at addresses

$4000-$7FFF (16384 to 32767 decimal), as seen by the CPU. Zeroing bit #5

makes it appear there as seen by ANTIC.

 

In my upgrade, bits #2, #3, #5 and #6 select one of the twelve banks.

Zeroing bit #4 makes the selected bank appear at $4000-$7FFF to both the CPU

and ANTIC. So, any program for the XE that uses the extended RAM for CPU

storage will work on an 800XL with this mod. Those programs won't use the

additional 128K though. Programs that use the video banking feature of the

XE might run on the modified XL, but the screen display will be wrong."

[morelenmir]

 

No, not so. I knew exactly what I was doing when designing the 256K expansion that eventually became RAMbo. I intentionally ignored separate ANTIC access for these reasons:

 

1 - I needed 5 PORTB bits and 3 were already used by the XL, so there was no room for ANTIC Bank Enable.

2 - I wanted to minimize the expansion circuit so it would be easier to build.

3 - There was no software that supported separate ANTIC access and I thought it unlikely there would be much, because it would only run on a 130XE and not on the millions of earlier Ataris.

 

My 1985 instructions stated clearly the extent of 130XE compatibility:

 

"I have designed a new upgrade for the 800XL that implements such a

scheme. Its similarity to the 130XE's scheme allows use of software for the

XE on a 256K 800XL.

 

To select one of four banks, the XE uses two bits, #2 and #3, in the

memory control register (port B of the 6520 PIA, addressed at $D301 or 54017

decimal). Zeroing bit #4 makes the selected bank appear at addresses

$4000-$7FFF (16384 to 32767 decimal), as seen by the CPU. Zeroing bit #5

makes it appear there as seen by ANTIC.

 

In my upgrade, bits #2, #3, #5 and #6 select one of the twelve banks.

Zeroing bit #4 makes the selected bank appear at $4000-$7FFF to both the CPU

and ANTIC. So, any program for the XE that uses the extended RAM for CPU

storage will work on an 800XL with this mod. Those programs won't use the

additional 128K though. Programs that use the video banking feature of the

XE might run on the modified XL, but the screen display will be wrong."

 

It is really nice to get it straight from the horses mouth as it were!!! Many thanks indeed for replying ClausB!!!

 

I do think there is something of a chicken-and-the-egg scenario going on as well. There was no need for Compy-style access because so few programmes needed it, but there were so few programmes that needed because there were few Compy-style upgrades! Nowadays we are lucky to be able to have the best of both worlds and even the XL's can get 512k Compy via the Ultimate1MB.

[flashjazzcat]

IMO, the main factor which restricts the use of separate Antic RAM access is not sporadic implementation, but the fact that the CPU and Antic cannot simultaneously access different extended banks (since there's only one register). This severely restricts the scenarios in which it can be used. You can't, for instance, keep the frame buffer of the application in an extended bank while simultaneously allowing the CPU access to a different bank without completely clattering the display.

[morelenmir]

IMO, the main factor which restricts the use of separate Antic RAM access is not sporadic implementation, but the fact that the CPU and Antic cannot simultaneously access different extended banks (since there's only one register). This severely restricts the scenarios in which it can be used. You can't, for instance, keep the frame buffer of the application in an extended bank while simultaneously allowing the CPU access to a different bank without completely clattering the display.

 

The frame buffer is the display memory?

[Heaven/TQA]

I find it a nice feature which i explored in Arsantica 2 in Voxel flight.

 

the separated access of antic and CPU is a nice feature if used right.

[Kyle22]

I find it a nice feature which i explored in Arsantica 2 in Voxel flight.

 

the separated access of antic and CPU is a nice feature if used right.

And, if the opcodes are used right, there will be no problems for the growing number of '816 users out there.