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Developers/testing required for mini-itx clone system - ÉclaireXL


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#151 danwinslow OFFLINE  

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Posted Mon Sep 11, 2017 8:48 AM

I'm keen on getting some help with the firmware. Is anyone capable/willing to take on the role of 'main firmware developer'? So I can focus on purely the hardware side.

It can be written in any language, but since code size needs to be small, and the existing firmware is written in it, I propose C. Debugging will be via gdb and a jtag connection to the eclaireXL.

The firmware currently provides the following features:
i) USB HID joystick and keyboard decoding
ii) SD card reading, fat decoding
iii) SIO drive emulation
iv) Cartridge emu setup
v) OS/BASIC rom loading
vi) Video settings

I'm in the process of changing the core to be more a 'modern system' with the 6502 and antic as additional bus masters. Previously the 'ZPU' was bolted on top of the Atari as an afterthought.

The plan is to use the VexRiscV CPU (can compile with GCC, debug via GDB) and a crossbar wishbone interconnect. All the atari custom chips, USB hardware, SD card, will be mapped into a large linear address space. Then the 6502 and antic will access this via an address translation layer. With possibly a 2nd PIA to allow the 6502 to access some of the additional hardware and settings (e.g. turbo!).

I'm busily working on the hardware changes for this, which will take some time to build. After which I'll need to port or rewrite the firmware for the new setup. I think it needs a significant rewrite to be 'good' but I don't think I have the time/motivation for that. Is anyone up for the challenge?

 

I doubt if any one person would be able to take all of this up. Phaeron, Flashjazzcat, the many excellent german & polish coders, all come to mind. I am actually very experienced with C and I've done some simplistic USB HID work before, so I might be able to help with item i. I would need a lot more details about the USB input architecture and probably would eventually need a test system.



#152 santosp OFFLINE  

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Posted Mon Sep 11, 2017 2:20 PM

Dan you have pm.  :)



#153 danwinslow OFFLINE  

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Posted Mon Sep 11, 2017 4:46 PM

OK, Thanks Santos. 

 

So. Santos or foft-

1. Will I need a JTAG cable? Can I upload through the serial port? 

2. Is there a native OS or something on this board, like a linux or whatever?

3. What dev tools will produce the correct binaries? GCC? Visual C++? Either?

4. Any docs that relate to the process of getting new firmware onto the board? If the board is an FPGA, and that only, I assume the only way to get new firmware on it is with the JTAG or serial?

5. Besides JTAG, do I need any special hardware/software to upload or talk to the board?

5. Is it too late to talk you into adding a cheap Ethernet solution to the board? :)


Edited by danwinslow, Mon Sep 11, 2017 4:48 PM.


#154 santosp OFFLINE  

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Posted Mon Sep 11, 2017 5:04 PM

OK, Thanks Santos. 

 

So. Santos or foft-

1. Will I need a JTAG cable? Can I upload through the serial port? 

4. Any docs that relate to the process of getting new firmware onto the board? If the board is an FPGA, and that only, I assume the only way to get new firmware on it is with the JTAG or serial?

5. Besides JTAG, do I need any special hardware/software to upload or talk to the board?

 

You need exact this cheap cable.  :)

 

http://www.ebay.com/...WIAAOSwBLlU9cqd

 

6. Is it too late to talk you into adding a cheap Ethernet solution to the board?  :)

 

I think that is never too late for anything! We have a expansion connector and a big chat around this! ;)


Edited by santosp, Mon Sep 11, 2017 5:14 PM.


#155 danwinslow OFFLINE  

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Posted Mon Sep 11, 2017 5:25 PM

On the Ethernet subject, I can recommend one if you get to that point. Most convenient would be a CS8900A compatible as I already have a driver, but anything with an 8-bit mode would be fine. You may want to consider a chip that has its own TCP stack already on it, too, although that would be a big change. The crucial point there is that it's got to be interfaced via PBI or something, or even mapped in memory. Reading from SIO serial won't work well.


Edited by danwinslow, Mon Sep 11, 2017 5:27 PM.


#156 foft OFFLINE  

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Posted Tue Sep 12, 2017 12:58 AM

OK, Thanks Santos. 
 
So. Santos or foft-
1. Will I need a JTAG cable? Can I upload through the serial port? 
2. Is there a native OS or something on this board, like a linux or whatever?
3. What dev tools will produce the correct binaries? GCC? Visual C++? Either?
4. Any docs that relate to the process of getting new firmware onto the board? If the board is an FPGA, and that only, I assume the only way to get new firmware on it is with the JTAG or serial?
5. Besides JTAG, do I need any special hardware/software to upload or talk to the board?
5. Is it too late to talk you into adding a cheap Ethernet solution to the board? :)


1) Need a USB blaster
2) No, not even libc. No malloc, just use the ram. There is a small printf and lightweight fat and sd card library. Also a USB library.
3) Currently zpu gcc. I plan to switch to vexriscv. There you have gcc, gdb and openocd to debug. Can use eclipse as an ide (I don't). Linux is easiest for the tool chain. I use virtual box on my windows laptop if you don't have a Linux box.
4) Currently built into rom on core file - can update rom without full rebuild. On vexriscv can load via jtag and I'd like to get code loading from sd and spi flash.
5) Altera quartus free edition.
6) If you can convince Panos! Price and board space are potential issues.

#157 foft OFFLINE  

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Posted Tue Sep 12, 2017 12:59 AM

On the Ethernet subject, I can recommend one if you get to that point. Most convenient would be a CS8900A compatible as I already have a driver, but anything with an 8-bit mode would be fine. You may want to consider a chip that has its own TCP stack already on it, too, although that would be a big change. The crucial point there is that it's got to be interfaced via PBI or something, or even mapped in memory. Reading from SIO serial won't work well.


I was thinking of putting things like this in the large linear space. The 6502 could bank it in with a 2nd pia. Would that work?

#158 danwinslow OFFLINE  

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Posted Tue Sep 12, 2017 4:32 AM

1) Need a USB blaster
2) No, not even libc. No malloc, just use the ram. There is a small printf and lightweight fat and sd card library. Also a USB library.
3) Currently zpu gcc. I plan to switch to vexriscv. There you have gcc, gdb and openocd to debug. Can use eclipse as an ide (I don't). Linux is easiest for the tool chain. I use virtual box on my windows laptop if you don't have a Linux box.
4) Currently built into rom on core file - can update rom without full rebuild. On vexriscv can load via jtag and I'd like to get code loading from sd and spi flash.
5) Altera quartus free edition.
6) If you can convince Panos! Price and board space are potential issues.

OK, thanks. Just read up on ZPU, interesting. I assume  vexriscv is a similar situation?

 

I was thinking of putting things like this in the large linear space. The 6502 could bank it in with a 2nd pia. Would that work?

Well, that would put it into address space at some spot, so yep as long as the device has a memory mappable command/data bus. PBI would also work.



#159 foft OFFLINE  

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Posted Tue Sep 12, 2017 4:41 AM

Vexriscv is new and the riscv architecture looks like it'll be around for a while. There are links to gcc and gdb binaries on the GitHub. So far I compiled the cpu and ran the example of debugging with verilator. So a way to go on that one yet.

I prefer memory mapping to pbi, it'll play better with turbo mode. Have to wait a long time on pbi to know if eg extsel is set.

#160 HiassofT OFFLINE  

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Posted Tue Sep 12, 2017 4:32 PM

A probably much easier option for networking would be to use the rather popular and cheap ESP8266 boards.

 

Just synthesize another uart into the design, mmap it somewhere in the atari space and and provide 2 GPIOs (maybe on some connector with GND and 3V3 as well) where users can hook up the board.

 

We could even dynamically route that to SIO so it could (optionally) be accessed via standard pokey as well. But a fast UART would probably be better.

 

so long,

 

Hias






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