The PBI bus on my 800XL always held magical and mysterious powers... It seemed to be the key to unlocking unlimited potential of my Atari. In my earliest years with the XL (age 9-13 or so), I didn't really know much about what lay behind the port cover. As I got a little older, I learned about the products like the Multi I/O and the Black Box which could be plugged in, but these were always priced out of my reach.
As it would happen, I was destined to eventually follow a career path of software & electronics engineering, but my understanding of topics like parallel data buses would not come until I was a bit older yet, and had already moved on from the Atari to my first PC. Over the many years since then, I've gone on a few "nostalgia benders," digging up my old Atari gear and playing around with it for a while. Each time, I'd idly thought about maybe doing a PBI bus project, just to "check it off the list" so to speak. Well, this time I'm hoping to actually make it a reality, and I've started some work on a project that I think will blend the "old" (being the Atari) and the "new" (being some modern technologies I've been working with on other projects) in interesting ways.
I've debated whether I should labor away in the dark without sharing any info until I reach some arbitrary milestone, or share a progress log to get feedback, help and motivation from folks here. I've opted to try the latter.
So, I present the very first fledgling steps of my PBI bus to WiFi adapter for the 8-bit. I'm basing it on somewhat absurdly powerful but relatively inexpensive technology (an Espressif ESP-32 - a dual core processor standalone WiFi/Bluetooth module, and a small Altera MAX 10 FPGA). This is a massive pile of technology compared to the Atari, but I've been developing on the ESP32 for a few months on another project and am pretty familiar with it, and I've wanted an excuse to do a small FPGA project for a while now. I like the idea of combining these things.
My initial goal is to make a wifi coprocessor for the Atari, with the ESP32 doing most of the heavy lifting for dealing with TCP/IP connections. In the initial incarnation, I'd like to present it to the Atari as an R: compatible interface, so it can be used right out of the gate as a replacement for an 850 + Lantronix device, except hopefully much faster. This way it can be used with BBS and terminal software.
Longer term goals? Well, the sky's the limit really. The ESP32 has all kinds of interesting hardware support in it, and I've used much of it for another project. SD cards, audio, serial ports, I2C, Bluetooth, etc. There's a ton of potential to make it a PBI-based disk drive for example. Combined with the capabilities of the FPGA, it opens a lot of doors to doing interesting things. The daydreaming is great, but I'm trying to keep focused and meet a reasonable goal and then see where the project goes.
My rough architecture is that the ESP32 is going to communicate with state machines in the FPGA over a high speed SPI bus (it has no parallel buses). The FPGA will mediate between the slow Atari parallel bus and the high speed SPI bus. The FPGA I've chosen has a bunch of RAM and Flash ROM elements in it, so it can contain shift registers or dual ported RAM to aid this, and it can also contain the small amounts of PBI device handler code that need to be mapped in.
I'm breadboarding the first version because there are a few unknowns, and sometimes it's just easier to go old school and hand-wire stuff. I started this process last night, wiring up the address and data buses to the necessary level-shifting bus transceivers, because the Atari is a 5V system while the FPGA and the ESP32 are both 3.3V. I also have the FPGA eval board and the ESP32 development module positioned on the breadboard, but not yet connected.
Edited by TangentAudio, Thu Mar 30, 2017 10:26 AM.