I've been fascinated with the idea of modding our Intellivisions to get a little more out of them. To this end, I started playing with an idea: what if we had a board that could sit between the STIC and the rest of the Inty that could provide extra GRAM, and what if it could be enabled or disabled in software? So as an experiment I wrote a VHDL for one. This is the very first time I ever tried coding VHDL, so I have no idea if it will work or if it would fry an Inty, but I figured I'd post it here in case there are people more knowledgeable about it.
It works by intercepting CPU writes to four "unused" STIC registers at 0x33 through 0x36: if you write "eXtR" to them it switches into extended-GRAM mode and if you write "nOrM" to them it switches back to standard mode. In extended-GRAM mode it intercepts the signals coming from BAR', DTB', and DWS' and determines (based on the last address it saw on the STIC bus) whether to pass them along to to the GROM chip or not. If the address was outside the normal GRAM range (but within the extended GRAM range), it addresses separate RAM instead. The RAM would lie on the same bus as existing GRAM, with this chip choosing either normal GROM/GRAM or extended GRAM as appropriate. The idea is to allow 256 GRAM cards when not in foreground/background mode.