Schematic variation for 5200 2 ports?

[7800fan]

While waiting for parts for making my own Masterplay clone and to do power mod on my 4 port console, I tackled the 2 ports I have. Won't accept cart, there's something inside the slot that I couldn't get it out so I went ahead and took it apart for eventual cart slot replacement from Best site. I noticed my 2 ports had a few jumper wires. I compared with the 2 ports schematic I found on console5 site and came up with these:

 

A7 POKEY pin 8, 9, 10, and 11 shown as NC on schematic, but they were tied to ground on mine. Bug fix? All it did was to force the unused player 3 and 4 pot lines to ground. I wonder if Atari found issues with floating input causing glitches on games that are designed for 4 players.

 

A27-A (one of 4 NAND gates) was not found in schematic, but pin 1 and 2 (inputs) are tied and jumpered to ø1 (pin 3 of CPU and pin 18 of EXT). Another wire connected from pin 3 (output) of A27 to pin 11 of A15 (input). Pin 11 is cut and lifted from the PCB, the schematic had it originally connected to pin 12 of A15 Appears this change is to invert ø1 signal and add to A15 along with 5 other separate inputs to control RAM /CAS. Could be bug fix related to RAM timing?

 

These were hand fixed and as far as I can tell, all done before putting the RF shield on since it's a pain in the butt to take it apart and I didn't see any sign of scratch or something that looks like it was fixed after RF shield was first installed. Unless Atari used snips and clipped all the tabs for easy removal?

[CPUWIZ]

A7 POKEY pin 8, 9, 10, and 11 shown as NC on schematic, but they were tied to ground on mine. Bug fix? All it did was to force the unused player 3 and 4 pot lines to ground. I wonder if Atari found issues with floating input causing glitches on games that are designed for 4 players.

 

Yes, if you look at the schematic for a 800XL, you'll see how the POKEY is supposed to be connected, to "mute" the extra 4 analog inputs. Leaving them floating can cause issues, if you read them and rely on the result for some reason.

[SignGuy81]

 

A27-A (one of 4 NAND gates) was not found in schematic, but pin 1 and 2 (inputs) are tied and jumpered to ø1 (pin 3 of CPU and pin 18 of EXT). Another wire connected from pin 3 (output) of A27 to pin 11 of A15 (input). Pin 11 is cut and lifted from the PCB, the schematic had it originally connected to pin 12 of A15 Appears this change is to invert ø1 signal and add to A15 along with 5 other separate inputs to control RAM /CAS. Could be bug fix related to RAM timing?

 

 

 

 

The schematic that shows this is here http://kickass.ddnss.org/html/library/documents/5200FSM.pdfon page 31 and 32. They are drawn as AND gates in this schematic though, not NAND gates.

[7800fan]

 

 

The schematic that shows this is here http://kickass.ddnss.org/html/library/documents/5200FSM.pdfon page 31 and 32. They are drawn as AND gates in this schematic though, not NAND gates.

 

7400 (all variants including 74LS00) are NAND. The chip on my 5200 are 74LS00 and the schematic specified 'LS00 so the schematic drawing may be wrong, missing a little "o" on the end of each of those 3 gate.

 

Also I looked at the schematic. I can see A27B, C, and D but no A which is where I was at when I found the extra wires, and pin 11 and 12 are connected on A15B (which looks like A158 due to poor quality scan) while on mine one of the pin was cut and lifted from PCB to break that connection.

[SignGuy81]

 

7400 (all variants including 74LS00) are NAND. The chip on my 5200 are 74LS00 and the schematic specified 'LS00 so the schematic drawing may be wrong, missing a little "o" on the end of each of those 3 gate.

 

Also I looked at the schematic. I can see A27B, C, and D but no A which is where I was at when I found the extra wires, and pin 11 and 12 are connected on A15B (which looks like A158 due to poor quality scan) while on mine one of the pin was cut and lifted from PCB to break that connection.

 

 

The one I was looking at, that you were referring to with the inputs tied to pins 3 of CPU and 18 of the connector is labeled LS51 which the chip is a 2 wide 2 and 2 wide 3 input AND-NOR gate chip. 7451 The AND gate you were referring to is from that chip.

Edited June 8, 2017 by SignGuy81

[7800fan]

Just to make sure no confusion between us or anyone else looking on this, this is what I see on my 2 port 5200. Red is new compared to existing schematics:

 

EDIT: and the POKEY alteration:

Edited June 8, 2017 by 7800fan

[SignGuy81]

I follow you now, it is in addition to the chip that was already there on the schematic I was looking at. Since there was already inputs from the AND gate on the schematics going where you said the inputs were going I assumed it was just a mix up but now I see what you mean I believe, they added a NAND gate from the other chip between what I was looking at on the schematic.

[7800fan]

Right. Originally that one NAND game was left unused in the original schematic and wasn't connected to anything on the PCB.

[Bryan]

On the 2-port, Atari removed the ability to completely decode the remaining 2 ports. Instead, selecting controller 3 or 4 will return keycodes when controllers 1 & 2 are used (which is inexcusable cheapness in my opinion). This caused a major bug in the first run of Castle Crisis cartridges since I had been testing everything on a 4-port. I then had to look for those 4 grounded pot inputs to determine how to read the keypads.