can you in detail describe what the fix in the high speed code was for NTSC and what the difference was PAL v NTSC etc. Delving into SIO issues, this could make the scope of understanding much better
The issue is that the highspeed serial receive code in the original Speedy ROMs is a bit too slow to keep up with full sector transfers. The timing is marginal for PAL Ataris and just too slow for NTSC Ataris (which run a tiny bit faster than PAL Ataris). Kudos to phaeron for analyzing that, more details are in his post here: http://atariage.com/...-2#entry3744532
I've rewritten the highspeed receive code in the Speedy ROM so that it has enough headroom to synchronize on each start bit and samples the SIO data line at the correct position - in the middle of each bit. This code can now keep up both with the PAL and NTSC Atari transfer speeds and also should work better when connecting the drive to a PC (using a 1050-to-PC interface).
Unfortunately we don't have the source code to the Speedy ROMs, so I implemented the fix for the latest 1.6 Speedy ROM version (which came from the Super Speedy and is used as a base for the Mega Speedy ROM). I'm binary patching the 1.6 ROM with assembled code fragments and also had to move a few other Speedy ROM routines to new locations to make room for the slighly longer fixed highspeed receive code. I've also bumped the embedded Speedy ROM version number from 1.6 to 1.7 to make it clear that this ROM is not the original 1.6 version.
The ROMs for "Speedy mode" slots used the somewhat older 1.5 ROM version and since I didn't want to binary patch these as well I simply bumped it to the patched 1.7 version.
So, all Speedy modes (Speedy, Super Speedy, Mega Speedy) now use the same Speedy ROM version.