Hmmm... quite a necro-bump. But since I was already looking at the schematics, I figured I'd answer it. That chart is a little confusing.
TIA is selected whenever both address bits A7 and A12 are low, so address < $1000, and low byte $00-$7F... TIA doesn't use address bit A6, so the TIA is at $00-$3F and mirrored at $40-$7F.
RIOT is selected whenever address bit A7 is high and A12 is low, so address < $1000, and low byte $80-$FF. RAM is selected when address bit A9 is low, so when the high byte is $00 or $01.
$0000-$007F - TIA
$0080-$00FF - RIOT - RAM
$0100-$017F - TIA
$0180-$018F - RIOT - RAM
$0200-$027F - TIA
$0280-$02FF - RIOT - IO
$0300-$037F - TIA
$0380-$03FF - RIOT - IO
Then this layout is mirrored 3 more times:
Hopefully this clarifies what's going on.