Information on the Geneve's Gate Array

[AwkwardPotato]

Is there any information out there on the Geneve's ASIC? (documentation, datasheets, etc.)

I assumed there wouldn't be very much considering that it wasn't a very popular system, but I can't really find anything at all.

[+9640News]

I assume you have seen this?

 

ftp://ftp.whtech.com/Geneve/schematics/

 

I think this is more entailed than some drawings I had, however, I did have a customer of 9640News back in the 90's that pulled all the chips off his Geneve and mapped out all the pinouts, etc. on the board. I should still have those drawings if the Geneve drawings on the whtech site are insufficient.

 

As far as the gate array itself, the whtech site I referenced is the only place I know where that information may exist unless Tim Tesch or Richard Bell had some details.

 

Beery

[+Ksarul]

So far as I know, no one has a complete mapping of the internals of the gate array. As noted already, the pin out is there, but that is about as far as it goes. I have a prototype Geneve that doesn't have a gate array, but I can't really say how much difference there is between the discrete logic chips on it and the gate array that replaced them on the later production machines. . .

[+9640News]

So far as I know, no one has a complete mapping of the internals of the gate array. As noted already, the pin out is there, but that is about as far as it goes. I have a prototype Geneve that doesn't have a gate array, but I can't really say how much difference there is between the discrete logic chips on it and the gate array that replaced them on the later production machines. . .

 

Does that Geneve boot and run with the current MDOS?

 

I saw a wire wrap Geneve in late 85 or 86 at a Nashville show that Jack Riley had at the time. I think it had a problem and would not boot and blamed it on a likely wire loose issue. I believe that was the only time I ever met Mike Dodd and he was only like 12 to 14 years old if that much at the time.

 

Beery

[+Ksarul]

It does not, as it doesn't have the additional zero-wait-state RAM, among other issues. It also needs an adapter to flip the connections to the opposite sides of the motherboard, as they put the front of the layout on the back and the back on the front. . .definitely NOT a daily driver machine.

[+InsaneMultitasker]

To my knowledge, that information (about the gate array) has never been released. It was not included in the hardware and information given to Cecure Electronics (where I worked) when Myarc handed over the property and remaining parts (and boards for repair) in the 90s. Jeff White and/or Don O'neil may have the video PAL information, though I don't recall it ever being released into the wild. Schematics and other information has been posted, including the versions I used during my Myarc repair days and the Ron Walters redo.

[RickyDean]

Okay, Mr. Insane One Tim, where can I get a replacement Gate Array? I on another thread stated I blew my Geneve, by plugging it into as TI powered PEB, that I had modified years ago with a whisper quiet fan, so I mistook it as a switching PS, when it wasn't. I have replaced all the system memory, a couple of 74ls244's, the Rom, the Sram, 9901, and the video ram. all bad. The ASIC got hit too, because I can put my array from the other Geneve(the one you installed PFM+ on years ago, found it had bad video memory, during this process) and I get a Swan. Do I get with Swim(Richard)? Thanks, Sir

[RickyDean]

Slow computer this morning, not updating the screen fast enough.

 

As a side note, the ROM had all DF's in it when read by a Minipro, does this mean that is can't be erased and reprogrammed?

Edited May 9, 2018 by RickyDean

[RickyDean]

As a side note, I think something like this would be a good thing.

 

http://www.retroclinic.com/leopardcats/gatearray/gatearray.htm

Edited May 9, 2018 by RickyDean

[+InsaneMultitasker]

Okay, Mr. Insane One Tim, where can I get a replacement Gate Array? I on another thread stated I blew my Geneve, by plugging it into as TI powered PEB, that I had modified years ago with a whisper quiet fan, so I mistook it as a switching PS, when it wasn't. I have replaced all the system memory, a couple of 74ls244's, the Rom, the Sram, 9901, and the video ram. all bad. The ASIC got hit too, because I can put my array from the other Geneve(the one you installed PFM+ on years ago, found it had bad video memory, during this process) and I get a Swan. Do I get with Swim(Richard)? Thanks, Sir

 

Both Richard and I have a very limited number of gate arrays available. Once gone, they're gone. In cases where I am not the one repairing the card and it is certain the gate array is at fault, I ask that the bad gate array is sent to me before I will provide a good one in return. Replacements are not to be listed on ebay or similar venues.

 

Send me a PM to start the ball rolling. I'll reach out to Richard and we'll determine which of us is in a better position to release a gate array.

 

Does the Geneve boot with the good gate array or does it just sit at the swan screen?

[RickyDean]

 

Both Richard and I have a very limited number of gate arrays available. Once gone, they're gone. In cases where I am not the one repairing the card and it is certain the gate array is at fault, I ask that the bad gate array is sent to me before I will provide a good one in return. Replacements are not to be listed on ebay or similar venues.

 

Send me a PM to start the ball rolling. I'll reach out to Richard and we'll determine which of us is in a better position to release a gate array.

 

Does the Geneve boot with the good gate array or does it just sit at the swan screen?

It tries to boot, but I do not have a floppy installed as of yet so it gives me the floppy not found screen. Let me test it more thoroughly tonight, it was 11:15pm last night and I had to go to bed to come to work this morning. I have no trouble sending the gate to you. afterward. Thanks Tim.

[Swim]

The insane one is correct when he mentions our Geneve Application Specific Integrated Circuit or "gate array" exists in a limited quantity. I post these pics here for historical reference.

[RickyDean]

I'm glad I made it this long till needing one, hopefully never again, after this.

[Swim]

To my knowledge, that information (about the gate array) has never been released. It was not included in the hardware and information given to Cecure Electronics (where I worked) when Myarc handed over the property and remaining parts (and boards for repair) in the 90s. Jeff White and/or Don O'neil may have the video PAL information, though I don't recall it ever being released into the wild. Schematics and other information has been posted, including the versions I used during my Myarc repair days and the Ron Walters redo.

 

You remind me that WHT had been selling this PAL at one time. I wonder if Jeff White would recall what it actually did to help the Geneve video?

[+9640News]

It dropped some kind of wait states on the video, however, one had to be careful with a Memex system as if the count were dropped too low, things would mess up. If I am not mistaken, there were separate values optimized for both read and write.

 

Seems like my Geneve from the 90's was used as one of the test systems to get the right number of states. Not sure if that work was done at a Lima show, or a Fest West show.

 

Beery

[techguru]

hey all -- I designed that ASIC and I recall posting the internals of the ASIC schematics to WHT a decade ago ... as well as actual schematics of the Geneve mainboard.  If they can't be located on WHT, perhaps I can dig them up again in one of my archives.  +PaulC aka techguru@byiq.com

[+Ksarul]

That would be most useful, Paul!  The ASIC schematic on WHT just shows the pinout and physical positioning of the input and output pins. The problem we have now is that the chips themselves are approaching the unobtainium state--so if you have the internal logic diagrams for the ASIC, it might be possible to design some form of plug-in replacement for it to keep the machines alive longer. Many thanks for the uploads you made to WHT too--they have helped a lot!

[techguru]

has anyone contacted Mitsubishi Asic Division (MELA) to see if they still have net lists for the Geneve GateArray? (and, if so, who would they release them to?). As I recall, it was the first ASIC they ever did for a US based customer.  At the time we did the project, their US based office was in Research Triangle Park area of North Carolina.   Also, as for the PAL -- to the best of my recollection it had two main purposes: (1) to correct a timing glitch in the GateArray, (2) to provide current buffering between the CMOS gate array and some of the other Schottkey chip inputs, and (3) to correct whatever other glitches we found in the overall logic during original integration testing.

 

I will not have direct access to my older personal archives until sometime around new years.