The project that's been soaking up all my spare time recently has now come to its natural end, the party is over, and everyone had a great time. With that done, time to turn to the next one on the list...
For some time now I've been toying with the idea of expanding the XL I have in the attic - then the 1088XEL came along, and MacRorie was good enough to build me one [in fact 2, but that's a different story] while I was otherwise engaged (see above link [grin]). In my "copious free time"[tm], I've been throwing ideas back and forth in my head, culminating in what is described here - the PBIO. Most of the details for what I've worked out so far are at that link, but...
The basic idea is:
- To provide easy hardware expansion, and to make that hardware (to the extent that it is possible) platform-neutral.
- To make it plug-and-play
- That it should be transparent to the system unless in active use
- That it should be elegant, or at least as elegant as an expansion chassis can physically be
- That it ought to be not-too-expensive
- That it ought to exploit the possibilities it offers as best it can
- That it ought to integrate well with the hardware available, including such things as the 1088XEL.
So, the totally enclosed system would see the use of a Cooler Master Elite 110 enclosure, which also contains the 1088XEL and provides 8 slots + 2 full-height PCIe slots, one of which might be useful as a cartridge slot.
Alternatively, the 800XL or 130XE user can plug into the Parallel bus or 'ECI port' on the back of the stock machine, and get identical features, even if its a little bulkier. As mentioned on the website, if there's sufficient demand, it'd be possible to get a custom case engineered - I'd prefer a mini-ITX footprint to match the H60/H80 cases that 1088XEL users have been generally going for, but options are open.
What is also worth mentioning is that the host-interface (the part that plugs into the host machine via parallel bus or ECI port) will contain an XMOS CPU with 16 hardware threads, only 5 or so of which will be required for the PBIO itself. This PCB will also supply 32MBytes of SDRAM, mappable into the host computers address space using an enormously flexible register-descriptor approach, although it would also be possible to emulate the Pokey port-B interface since the XMOS chip will be monitoring all bus traffic.
The host interface will also provide an SD-card interface with async I/o to the SDRAM. The SD card and SDRAM in and of themselves will provide huge benefits to the 8-bit computer, even if the user never uses or buys the parallel bus expansion unit. One example might be to place screen RAM into the SDRAM-mapped area, and have the XMOS blit data around within the 8k of screen during vblank, effectively getting a GPU by manipulating a few registers in a VBI.
Another use might be to massively speed up floating point ops - effectively getting an FPU. Another use might be to provide timing interrupts at a very high granularity - it ought to be possible to do interrupts on a position along the horizontal scan-line basis, for example - there are built-in high-resolution timers on XMOS chips, and they are completely predictable in terms of response time.
As far as using the parallel bus expansion hoes, data transport will be via an 'xlink' - basically a 100 Mbit/sec link between any XMOS core and any other XMOS core. In this case we'll be using transceivers to push the signal over cat-6 ethernet from host to expansion box and back. Once the XMOS in the expansion chassis has received a message asking/telling it something, it can interact with the plug-in devices, get any required data, package it up and send it back over the wire to the host interface, which in turn relays it to the 8-bit host.
This means the plug-in card is isolated from any particular host interface, and only needs to understand the message protocol between XMOS and plug-in card (a simple eSPI-like protocol). This allows for a level of portability (you'd still have to port the software that makes use of the device) between different computer systems, thus allowing for a standard hardware interface across different platforms.
Where are we at:
I've designed the PCB for the host interface for an XE (actually for the [second, sigh] 1088XEL that'll be winging its way towards me RSN and I've got some of the components soldered in on that board already - the XMOS is in and I'm working on the power circuitry so I can bring things up in a piece-meal fashion to try and keep the magic smoke inside the chips as long as possible.
I've also designed an ECI PCB I can connect a logic analyser to, which I can then use to capture and record timings of a real XE bus, which will be useful for:
The PCB that sits on the back of the STM Nucleo board and provides an ECI port. I can then use the STM to produce bus stimulations that mimic the XE but within a controlled environment that will make it much easier to debug.
There's a long way to go, its early-days yet and things might not go as I forsee, but even though the goal is grandiose, I think it's attainable and it'll be pretty cool once it's up and running.
How much will it cost ? As with all electronics projects, that depends on volume. A good goal price for the parts would be between $100 and $150 including enclosure. This, however, is not set in stone, its a seat-of-the-pants guesstimate. It might be possible just to make available just the host interface, in which case you might be looking at about half that. Note that this doesn't include assembly, which is again a highly volume-sensitive cost.