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Homemade atari super vcs {ntsc} 6502 questions

6502 6507 cy7c408 atari 2600 vcs video computer system TIA television interface adaptor Stella

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#51 universal2600 OFFLINE  

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Posted Fri Jun 1, 2018 6:24 PM

okay, I ended up having to refund my money for the sram, since it never arrived, but I was able to instead buy 128k worth of sram in a lot of 4 separate 32K chips for the same price, im using two of them one for normal program/data ram to extend from the 128bytes, which the atmega8515 will act as a mmu to read from and write to ram using the upper address bits to access either the mmu or the the dual port ram (IDT7130SA55) which would act as a memory buffer, though i am considering using atmega644 instead of an 8515 for its extra memory, only difference is no port E and but much more memory versus the 8515, but the 6502 would write to the ram, which the atmega would either do nothing, store it, or load it and do some processing, and store back to the dual port ram or store in in its own 32k for later use or vice versa. also i would use the atmega to control the tia and 6502, using the 6502 itself, i.e having the 6502 trigger the atmega which would halt the 6502 using its rdy line, and assume control of the tia, thing is either you can use the 6502 for addressing the tia, but would be limited to the 1.19 mhz clock (both atmega chips will run @ 21.47727MHZ) , or  instead use atmega to handle the tia bus, but the way i would implement this i think most likely would break normal 2600 compatibility unfortunately.

 

TL;DR

 

i had reorder sram but got a better deal , i've gotten some dual port ram, current progress is getting the memory map structured properly so that if you plug in a 2600 cart it will run just fine, but you insert a cartridge with homebrew code that would read and write to the extra address space, then you can use the extra hardware added to the system and use the 32k of ram and the dual port ram which the display co-processor would sit behind with its own 32k of video or  just general purpose ram (ie you could store graphics or program data or both if you wanted to).



#52 universal2600 OFFLINE  

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Posted Thu Jun 21, 2018 5:40 AM

Well I got a 2600 Jr mobo, I've boiled it down to having the 6502 communicate with an atmega644 driving 32k of sram and an ay-3-8910 which also has it's own 16bit gpio for additional expansion, with a few signals taken from other places you could make a small expansion port (well that's the idea) the 644 will hold a small kernel that consists of sound player rountine/gpio handler and accelerated TIA ("ATIA" mode, the 6502 can write the frame to the 644 which can store it in ram, then simply have the 6502 update the parts of the frame that have changed, and whatever hasn't will be free cycles for the 6502 minus keeping sync.

PS: I HAVE A DAY JOB SO I DONT GET PUT MUCH SPARE TIME TO WORK ON THIS, BUT THERE IS PROGRESS..

#53 universal2600 OFFLINE  

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Posted Sat Jun 23, 2018 6:30 PM

Okay I finished socketing this junior mobo, replaced the tia as the co10444d seems to have a better video output vs the um6526, replaced the 6532 aswell, I'm waiting on pin headers for the cpu socket, with the 6502, atmega644, ram and ay-3-8910 connected on a plugin board, (I didn't have a 28pin socket so I just cut a spare 40pin one down)IMG_20180623_202042.jpg


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#54 universal2600 OFFLINE  

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Posted Sat Jul 7, 2018 11:56 AM

Okay I have a prototype daughter board in progress, essentially the atmega will handle the ay-3-8910 (32k of ram would be addressed through it's "gpio" with the ram data bus connected straight to the 6502) the pic and 138 are for generating outputs for chip selection (bankswitch), essentially the extra hardware would be outside the normal 6507 memory map, so that any stock 2600 cart could run, but would just allow one to write code for a normal 6502, but also by using the upper address space to use the atmega to do tasks while the CPU is drawing the screen, as well as taking control of the bus, the atmega would have a bootloader that would sit idle until it was addressed directly from the 6502. It simply controls the banks (which the pic and 138 are there for, disabling the Tia, riot,ram,etc)
As well to allow it to play music from the ay38910(combined with the Tia audio, five independent sound channels!) and to halt the CPU and control the Tia if needed

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Edited by universal2600, Sat Jul 7, 2018 11:59 AM.


#55 universal2600 OFFLINE  

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Posted Mon Jul 16, 2018 5:40 PM

Finally got the rest of the components (minus a spare 6507), so the board sits snug ontop of a pin header connected directly to the 6507 lines, which would connect to the 6502(no not the one in the picture I have a new one I haven't opened it yet),I plan to use the pic, 138 and gal20v8b (lattice, yes it's obsolete, but it allows one to change the memory map just by flashing a chip😁........and its 5v), as glue logic so I can halt the 6502, generate chip selects, set up in the end you would write to locations that's normally outside the 6507 map, that could represent an instruction to the atmega to set the ram address (using the ay38910 ports) to read or write, and to allow the atmega to drive the tia while halting the cpu,or use the atmega to play sound through the ay38910 (ym player?)
IMG_20180716_191317.jpg

#56 universal2600 OFFLINE  

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Posted Sun Dec 23, 2018 6:20 PM

this project is not dead, so i've been making a custom pcb, using the 6502, tia, 6532, atmega8515 (this will be running at 21.477 mhz), and cxk58256 sram (32k), essentially the 6502 will act normally until you start to write to the upper bits a13-15, which connect to the atmega, and you would be able to store/load a byte (from or to the 6502) from the 8515 which would be programmed to be able to copy data from the the bus to external ram, or copy it to internal memory and do operations on such data; for example, be able to pre-process data, for better sound capabilities (generating sounds in software using the 8515, with little or no cost on 6502 performance), one can implement a frame-buffer using the 32k and 8515 to pre process the display in 32k ram and just store the location of this data in the riot to have the 6502 draw or just halt the 6502 (might put tri-state logic on the 6502 signals so the 8515 can just dma to the tia)  

 

pretty much have like 90% of the bus signals connected, i have to rearrange some aspects, everything minus control signals clock and analog outputs (tia) are connected (pretty much power clock r/w, oe, polarity/control/video/sound signals)

 

essentially you can write an 8bit value to the 8515, using 3 address lines, the 8515 would be programmed to use 3 bits on port E  as instruction registers, (256 x 3 different instructions, you wouldn't need 768 total instructions, but this would allow one to make special instructions for their specific purpose simply by changing how the 8515 rom decodes it, by toggling port E and then providing an 8bit value which the 8515 would decode into an operation  which then you would write the data to the 8515 which operation/function specified before would preform on, then store it internally, to 32k ram, or spit it back to the 6502 bus

 

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#57 rbairos OFFLINE  

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Posted Thu Jan 17, 2019 10:03 AM

Cool project. Still following. Any updates?


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#58 universal2600 OFFLINE  

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Posted Tue Mar 5, 2019 11:50 AM

Cool project. Still following. Any updates?

yeah slowly but i still work on it from time to time, I've been having real life getting in the way (work, medical bills due to dislocated shoulder, priorities..... )

 

the hard part is mapping the memory that would allow for full compatibility up to vcs  8k at least, mainly to have the 2600 mode on power on, so if there is vcs code loaded it'll just boot like a normal console and play as a normal console, and simply by jumping to addresses out of the 6507 bus ( a13 - a15), you simply would then go about initializing the extra ram, sound, and coprocessor, the ay8910 port is used to address 32k of ram, another 32k  connected to the cpu, plus 128 bytes on riot, which could be used in the enhanced mode as cache or used as stack space, im stuck between the atmega 8515 and 644 (8515 is designed perfectly for this purpose the 644 literally is the same with more memory but port E removed..why..

[which would make bank-switching/chip selects easier]) 

 

atm my board has the tia, 6502, riot, 8910, 644 and a gal20v88, with 64k total ram (sram) ( gal would be used for chip selects and bank switching) it's really now either make up my own memory map and then i could just make it as any other home brew computer, it would not be code compatible with 2600 software, however the software could still be ported...just have to modify code to use the new memory map, or keep as much 2600 compatibility which may limit the expansion hardware, as well i still have to write software for the atmega to handle dma for the tia chip, which either has to sit on its own bus or tristate the 6502 (extra logic needed for this) , since the tia operates solely as a slave (it only receives data sent to it, doesn't "transmit" any info, you have to stream data to it to have it do anything). plus all code would have to be done in assembler (not hard just takes more time) plus 6502 code to be able to use the extra hardware

 

i was contemplating using a cpld (emp240t dev board) to provide to glue logic to mitigate these issues, and would allow me to be much more flexible...but it's 3.3v and needs level shifters (low parts count makes pcbs cheaper to make) , but it has an onboard 50mhz which would help reduce some parts ( i could derive the atmega, tia, and cpu clocks from this by dividing it internally in the cpld, which also could be used for mmu functions or as a sort of buffer between tia and 6502 (which the atmega could use to access the tia and the cpld will simply override/tristate the 6502 bus and let the 644 write to the tia )

 

one question if your code starts at $f000 how does the hardware at power up know to jump there?, iirc it stars from $0000 which is accessing tia or riot then cartridge (this is why you shouldn't use CPU address lines as chip selects)

 

plus if there is enough interest i could make a few boards for anyone interested in it (hardware side is easy, but coding assembly will take a bit of time for me) to play with  and develop software for it, just pm me

 

 

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Edited by universal2600, Tue Mar 5, 2019 11:56 AM.


#59 splendidnut OFFLINE  

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Posted Tue Mar 5, 2019 8:38 PM

yeah slowly but i still work on it from time to time, I've been having real life getting in the way (work, medical bills due to dislocated shoulder, priorities..... )

 

the hard part is mapping the memory that would allow for full compatibility up to vcs  8k at least, mainly to have the 2600 mode on power on, so if there is vcs code loaded it'll just boot like a normal console and play as a normal console, and simply by jumping to addresses out of the 6507 bus ( a13 - a15), you simply would then go about initializing the extra ram, sound, and coprocessor, the ay8910 port is used to address 32k of ram, another 32k  connected to the cpu, plus 128 bytes on riot, which could be used in the enhanced mode as cache or used as stack space, im stuck between the atmega 8515 and 644 (8515 is designed perfectly for this purpose the 644 literally is the same with more memory but port E removed..why..

[which would make bank-switching/chip selects easier]) 

 

........

 

one question if your code starts at $f000 how does the hardware at power up know to jump there?, iirc it stars from $0000 which is accessing tia or riot then cartridge (this is why you shouldn't use CPU address lines as chip selects)

 

If you're trying to be completely VCS compatible, you'll want to avoid utilizing A13-A15 as triggers for your "enhanced mode". Atari 2600 bankswitched games usually utilize different addresses in different banks.  i.e.  Congo Bongo uses $Fxxx in the first 4k bank and $Dxxx for the second 4k bank.... since the 6507 sees these as the same address.

 

For more info on VCS memory layout, you might want to read thru the discussion here:  http://atariage.com/...y-architecture/

 

On boot up, the 650x series looks at $FFFC and $FFFD locations for the RESET vector.  More info here:  https://en.wikipedia...65xx_processors



#60 rbairos OFFLINE  

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Posted Wed Mar 6, 2019 10:52 AM

Thanks for the update.

Yah, I would suggest a jumper,  physical switch etc for hard selecting between 2600 mode and enhanced mode.
I have to assume there's way to much legacy code that relies on those upper address lines being ignored, in their execution.
 


Edited by rbairos, Wed Mar 6, 2019 10:52 AM.






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