foft Posted April 14, 2018 Share Posted April 14, 2018 I have written a new core for the Ultimate Cart. It is an implementation, a behavior based clone, of the Project Veronica 65816 cartridge. The 65816 implementation is not cycle exact but seems to run fairly reliably so far. In order to get it running you need to download and flash http://www.64kib.com/veronica/veronica20180414.pofusing the USB blaster. You will need to flash back the standard core to use it as a flash card reader later. You will then need software, I suggest trying the following two: http://atariage.com/forums/topic/164097-project-veronica/?p=3190927:atr file with tests and demos http://atariage.com/forums/topic/164097-project-veronica/?p=3227906:Veronica Basic Many thanks to Zenon/DIAL, Marek Konopka, and Simius for their work on the original. Thanks for Robin Edwards for his work on the Ultimate Cart. Thanks to Robert Finch for his 65816 core. Thanks for Avery Lee for his work on the documentation of the Veronica cart and Veronica Basic. See https://github.com/robinhedwards/UltimateCartfor details about the Ultimate Cart. See http://atariage.com/forums/topic/164097-project-veronica/for details about Project Veronica. See https://github.com/robfinch/Cores/tree/master/FT816for the 65816 core. See http://www.64kib.com/atarixlfpga_svn/trunk/atari_800xl/ultimate_cart/veronica/for my core to tie it all together. Video demos: 20 Quote Link to comment Share on other sites More sharing options...
Tezz Posted April 14, 2018 Share Posted April 14, 2018 Can I still get hold of an Ultimate cart in the U.K.? Quote Link to comment Share on other sites More sharing options...
electrotrains Posted April 14, 2018 Share Posted April 14, 2018 Can I still get hold of an Ultimate cart in the U.K.? I make small batches when people ask me. I've got one "in stock" at the moment. PM me if you want it? Robin 1 Quote Link to comment Share on other sites More sharing options...
electrotrains Posted April 14, 2018 Share Posted April 14, 2018 Hi Mark, That looks really amazing - I thought you'd probably forgotten about this project! Can't wait to give it a try later - maybe we can somehow combine the firmware at some point in the future, and have it as an option on boot? How much of the FPGA does the 65816 use? Robin 5 Quote Link to comment Share on other sites More sharing options...
Tezz Posted April 14, 2018 Share Posted April 14, 2018 I make small batches when people ask me. I've got one "in stock" at the moment. PM me if you want it? Robin Yes please, PM sent Quote Link to comment Share on other sites More sharing options...
+Stephen Posted April 14, 2018 Share Posted April 14, 2018 This is just awesome! 1 Quote Link to comment Share on other sites More sharing options...
foft Posted April 14, 2018 Author Share Posted April 14, 2018 That looks really amazing - I thought you'd probably forgotten about this project! Can't wait to give it a try later - maybe we can somehow combine the firmware at some point in the future, and have it as an option on boot? How much of the FPGA does the 65816 use? Yeah I 'finished it' back in 2016 then never got around to debugging it. In terms of usage: Total logic elements : 5,631 / 8,064 ( 70 % ) Total combinational functions : 5,497 / 8,064 ( 68 % ) Dedicated logic registers : 534 / 8,064 ( 7 % ) Total registers : 534 Total pins : 65 / 101 ( 64 % ) Total virtual pins : 0 Total memory bits : 0 / 387,072 ( 0 % ) Embedded Multiplier 9-bit elements : 0 / 48 ( 0 % ) Total PLLs : 1 / 1 ( 100 % ) UFM blocks : 0 / 1 ( 0 % ) ADC blocks : 0 / 1 ( 0 % ) Which is basically all the 65816 itself (5444/5631): +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Fitter Resource Utilization by Entity ; +-----------------------------------------------+-------------+---------------------------+---------------+-------------+------+------------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+------------+----------------------------------------------------------------------------------------+--------------------------+--------------+ ; Compilation Hierarchy Node ; Logic Cells ; Dedicated Logic Registers ; I/O Registers ; Memory Bits ; M9Ks ; UFM Blocks ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; ADC blocks ; Full Hierarchy Name ; Entity Name ; Library Name ; +-----------------------------------------------+-------------+---------------------------+---------------+-------------+------+------------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+------------+----------------------------------------------------------------------------------------+--------------------------+--------------+ ; |veronica ; 5631 (4) ; 534 (0) ; 0 (0) ; 0 ; 0 ; 1 ; 0 ; 0 ; 0 ; 65 ; 0 ; 5097 (4) ; 134 (0) ; 400 (0) ; 0 ; |veronica ; veronica ; work ; ; |FT816:cpu_65816_rob| ; 5444 (5262) ; 373 (373) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5069 (4897) ; 32 (32) ; 343 (332) ; 0 ; |veronica|FT816:cpu_65816_rob ; FT816 ; work ; ; |BCDAdd4:ubcda2| ; 42 (22) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 42 (22) ; 0 (0) ; 0 (0) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDAdd4:ubcda2 ; BCDAdd4 ; work ; ; |BCDAddAdjust:u1| ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDAdd4:ubcda2|BCDAddAdjust:u1 ; BCDAddAdjust ; work ; ; |BCDAddAdjust:u2| ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDAdd4:ubcda2|BCDAddAdjust:u2 ; BCDAddAdjust ; work ; ; |BCDAddAdjust:u3| ; 6 (6) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 6 (6) ; 0 (0) ; 0 (0) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDAdd4:ubcda2|BCDAddAdjust:u3 ; BCDAddAdjust ; work ; ; |BCDAddAdjust:u4| ; 4 (4) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 4 (4) ; 0 (0) ; 0 (0) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDAdd4:ubcda2|BCDAddAdjust:u4 ; BCDAddAdjust ; work ; ; |BCDAdd4:ubcdai1| ; 43 (24) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 37 (18) ; 0 (0) ; 6 (6) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDAdd4:ubcdai1 ; BCDAdd4 ; work ; ; |BCDAddAdjust:u1| ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDAdd4:ubcdai1|BCDAddAdjust:u1 ; BCDAddAdjust ; work ; ; |BCDAddAdjust:u2| ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDAdd4:ubcdai1|BCDAddAdjust:u2 ; BCDAddAdjust ; work ; ; |BCDAddAdjust:u3| ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDAdd4:ubcdai1|BCDAddAdjust:u3 ; BCDAddAdjust ; work ; ; |BCDAddAdjust:u4| ; 4 (4) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 4 (4) ; 0 (0) ; 0 (0) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDAdd4:ubcdai1|BCDAddAdjust:u4 ; BCDAddAdjust ; work ; ; |BCDSub4:ubcds2| ; 52 (13) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 47 (9) ; 0 (0) ; 5 (4) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDSub4:ubcds2 ; BCDSub4 ; work ; ; |BCDSubAdjust:u1| ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDSub4:ubcds2|BCDSubAdjust:u1 ; BCDSubAdjust ; work ; ; |BCDSubAdjust:u2| ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDSub4:ubcds2|BCDSubAdjust:u2 ; BCDSubAdjust ; work ; ; |BCDSubAdjust:u3| ; 15 (15) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 14 (14) ; 0 (0) ; 1 (1) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDSub4:ubcds2|BCDSubAdjust:u3 ; BCDSubAdjust ; work ; ; |BCDSubAdjust:u4| ; 14 (14) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 14 (14) ; 0 (0) ; 0 (0) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDSub4:ubcds2|BCDSubAdjust:u4 ; BCDSubAdjust ; work ; ; |BCDSub4:ubcdsi1| ; 46 (24) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 46 (24) ; 0 (0) ; 0 (0) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDSub4:ubcdsi1 ; BCDSub4 ; work ; ; |BCDSubAdjust:u1| ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDSub4:ubcdsi1|BCDSubAdjust:u1 ; BCDSubAdjust ; work ; ; |BCDSubAdjust:u2| ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDSub4:ubcdsi1|BCDSubAdjust:u2 ; BCDSubAdjust ; work ; ; |BCDSubAdjust:u3| ; 6 (6) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 6 (6) ; 0 (0) ; 0 (0) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDSub4:ubcdsi1|BCDSubAdjust:u3 ; BCDSubAdjust ; work ; ; |BCDSubAdjust:u4| ; 6 (6) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 6 (6) ; 0 (0) ; 0 (0) ; 0 ; |veronica|FT816:cpu_65816_rob|BCDSub4:ubcdsi1|BCDSubAdjust:u4 ; BCDSubAdjust ; work ; ; |atari_address_decoder:glue4| ; 3 (3) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (2) ; 0 (0) ; 1 (1) ; 0 ; |veronica|atari_address_decoder:glue4 ; atari_address_decoder ; work ; ; |config_regs_6502:glue2| ; 7 (7) ; 6 (6) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 4 (4) ; 3 (3) ; 0 ; |veronica|config_regs_6502:glue2 ; config_regs_6502 ; work ; ; |config_regs_veronica:glue1| ; 2 (2) ; 2 (2) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (1) ; 1 (1) ; 0 ; |veronica|config_regs_veronica:glue1 ; config_regs_veronica ; work ; ; |output_mux:glue7| ; 8 ( ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 8 ( ; 0 ; |veronica|output_mux:glue7 ; output_mux ; work ; ; |output_mux:glue8| ; 5 (5) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (2) ; 0 (0) ; 3 (3) ; 0 ; |veronica|output_mux:glue8 ; output_mux ; work ; ; |pll_veronica:pll1| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; |veronica|pll_veronica:pll1 ; pll_veronica ; work ; ; |altpll:altpll_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; |veronica|pll_veronica:pll1|altpll:altpll_component ; altpll ; work ; ; |pll_veronica_altpll:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; |veronica|pll_veronica:pll1|altpll:altpll_component|pll_veronica_altpll:auto_generated ; pll_veronica_altpll ; work ; ; |slave_timing_6502:glue3| ; 143 (129) ; 134 (120) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 9 (9) ; 91 (87) ; 43 (33) ; 0 ; |veronica|slave_timing_6502:glue3 ; slave_timing_6502 ; work ; ; |memory_timing_bridge:glue3a| ; 11 (11) ; 11 (11) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (1) ; 10 (10) ; 0 ; |veronica|slave_timing_6502:glue3|memory_timing_bridge:glue3a ; memory_timing_bridge ; work ; ; |synchronizer:synchronizer_phi| ; 3 (3) ; 3 (3) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 3 (3) ; 0 (0) ; 0 ; |veronica|slave_timing_6502:glue3|synchronizer:synchronizer_phi ; synchronizer ; work ; ; |sram_mux:glue6| ; 39 (39) ; 19 (19) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 7 (7) ; 6 (6) ; 26 (26) ; 0 ; |veronica|sram_mux:glue6 ; sram_mux ; work ; ; |veronica_address_decoder:glue5| ; 4 (4) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 4 (4) ; 0 (0) ; 0 (0) ; 0 ; |veronica|veronica_address_decoder:glue5 ; veronica_address_decoder ; work ; +-----------------------------------------------+-------------+---------------------------+---------------+-------------+------+------------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+------------+----------------------------------------------------------------------------------------+--------------------------+--------------+ Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy. 2 Quote Link to comment Share on other sites More sharing options...
foft Posted April 14, 2018 Author Share Posted April 14, 2018 (edited) I guess the max 10 can store two cores on flash and load another one itself somehow? The MCC216 (cyclone iii iirc) does this by storing multiple cores on the spi flash and using some of the Altera IP. Edited April 14, 2018 by foft Quote Link to comment Share on other sites More sharing options...
Kyle22 Posted April 14, 2018 Share Posted April 14, 2018 (edited) This is so awesome. I just hope that we find out that its possible to have both cart loader and 65816 CoPro at the same time. Edit: Effing Samsung autocorrect how do I turn this off? Edited April 15, 2018 by Kyle22 3 Quote Link to comment Share on other sites More sharing options...
xxl Posted April 15, 2018 Share Posted April 15, 2018 which cpu will be next in UCart? I hope z80 :-) 3 Quote Link to comment Share on other sites More sharing options...
atarixle Posted April 15, 2018 Share Posted April 15, 2018 (edited) x86_64 to virtualize Mac OS X on the VBXE and run multiple inctances of Atari800MacX Edited April 15, 2018 by atarixle 2 Quote Link to comment Share on other sites More sharing options...
+slx Posted April 15, 2018 Share Posted April 15, 2018 This is so awesome. I just hope that we find out that its possible to have both cart loader and 65816 CoPro at the same time. That would indeed be awesome (and might result in more Veronika programming being done). I got one but still try to wrap my head around programming on two CPUs that only communicate through a few bits. 1 Quote Link to comment Share on other sites More sharing options...
pedalpowered Posted July 24, 2019 Share Posted July 24, 2019 (edited) Is there any chance that this could be extended to support linear/flat memory addressing? I would certainly start developing for this, if that were the case. Also, I would love to see a 65816 core on the EclaireXL--but, again, with linear/flat memory addressing. That's the main reason I'm interested in the 65816, and it's the killer feature for programmers. I have some very cool games I could implement with such support. Edited July 24, 2019 by pedalpowered Quote Link to comment Share on other sites More sharing options...
foft Posted July 24, 2019 Author Share Posted July 24, 2019 I did try putting this and another (srg320’s) onto the EclaireXL, though without linear ram. For linear ram what is the appropriate memory map for the 65816? Quote Link to comment Share on other sites More sharing options...
Faicuai Posted June 4, 2021 Share Posted June 4, 2021 (Slight necro-bump, here)... Has been there any recent update on this project, worth sharing? Now that I have an AVG cart up-and-running, I thought of spending more time with Veronica-core for Ultiamte/SD. I managed to update and boot the last recorded .POF on this thread... just finding some issues (like 7.9Mhz of reported speed. vs. 14Mhz, for instance...) Has anyone dared to try this a little more? Quote Link to comment Share on other sites More sharing options...
_The Doctor__ Posted August 12, 2021 Share Posted August 12, 2021 I was interested in the multicore approach and the fixes from this thread folded in as well, https://atariage.com/forums/topic/321778-ultimate-cart-xex-loader-technical-issues/page/4/#comments @foft @electrotrains Quote Link to comment Share on other sites More sharing options...
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