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#1 SvOlli OFFLINE  

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Posted Mon Sep 10, 2018 2:50 PM

Hello!

 

Tjoppen came up with the idea on a maximum minimal demo, called "grey screen with no music" which only uses 16 bytes: http://www.pouet.net...php?which=77867

 

It kept me thinking. For me it's too minimal, because it does not generate a sync signal.

 

So right now, I'm thinking if a "more complete" demo could be done in ... lets say ... 32 bytes. Since address decoding always work on powers-of-two, anything between 17 bytes and 32 bytes can be considered the same. But still it would be interesting to see what could be done as a minimum, anyway.

 

The demo can be devided in 3 parts:

1) hardware init

2) generate sync

3) "display something" and wait for next frame

 

For 1) there is already an 8 bytes version, done by Andrew, if I recall correctly. The "CLD" can be dropped, as no "ADC" or "SBC" will be used.

For 2) and 3), I would go for 60Hz, as 262 lines "almost" fit in one 8-bit loop. Maybe, if the sync can be larger than 3 lines [6 to 8], we can go for a "mainscreen" of 254 to 256 lines. The loop value can be written to COLUBK, which will be a fair effect.

 

So, as it is to late for me to start hacking anything tonight, I think, I'll come up with a nice suggestion tomorrow, if no-one starts to contribute earlier.


Edited by SvOlli, Mon Sep 10, 2018 2:51 PM.


#2 JeremiahK OFFLINE  

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Posted Mon Sep 10, 2018 4:19 PM

If you don't care about where the stack pointer points to, you can clear zeropage in 7 bytes by simply pushing the value '0' 256 times:

    lda #0
    tax
clear_stack
    pha
    dex
    bne clear_stack


#3 RevEng OFFLINE  

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Posted Mon Sep 10, 2018 6:06 PM

If you're not worried about the opcode police, you can use "lax #0" instead of "lda #0", and skip the "tax".

#4 JeremiahK OFFLINE  

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Posted Mon Sep 10, 2018 7:10 PM

Unfortunately, LAX has no immediate addressing mode.  :(



#5 RevEng OFFLINE  

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Posted Mon Sep 10, 2018 7:49 PM

Unfortunately, LAX has no immediate addressing mode.  :(


Hah, you're right. :thumbsup: Guess I'm slipping.

#6 ZackAttack OFFLINE  

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Posted Mon Sep 10, 2018 9:58 PM

This is the best I could come up with in one sitting. It's more of a 2 step process since the TIA is initialized each frame.

 

Attached File  Zack's 32 byte demo - padded.bin   2KB   56 downloads

Attached File  Zack's 32 byte demo.bin   32bytes   44 downloads



#7 Omegamatrix OFFLINE  

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Posted Mon Sep 10, 2018 10:52 PM

If you don't care about where the stack pointer points to, you can clear zeropage in 7 bytes by simply pushing the value '0' 256 times:

    lda #0
    tax
clear_stack
    pha
    dex
    bne clear_stack

 
If you are not worried about decimal mode, then you can drop the CLD from my clear routine:
 

    cld
.loopClear:
    ldx    #$0A                  ; ASL opcode = $0A
    inx
    txs
    pha
    bne    .loopClear+1          ; jump between operator and operand to do ASL

The result from it is all TIA registers cleared, RIOT ram clear, SP=$FF, A=0, X=0, Carry is clear, and all in eight bytes! In this case it would be seven bytes if you lose CLD, which normally you would not do.

 

If you're not worried about the opcode police, you can use "lax #0" instead of "lda #0", and skip the "tax".

You are thinking of LXA (opcode $AB). Unfortunately it is unstable. LAX however is stable, but yeah no immediate mode.



#8 JeremiahK OFFLINE  

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Posted Mon Sep 10, 2018 10:57 PM

Now, that.  That is some beautiful code there.  The TXS can also be removed, if desired.


Edited by JeremiahK, Mon Sep 10, 2018 11:17 PM.


#9 JeremiahK OFFLINE  

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Posted Mon Sep 10, 2018 11:23 PM

It seems that 64B is the smallest possible program that runs in Stella, so here is my version, padded with first 32 zeroes, then the 32 bytes of code.

	PROCESSOR 6502
	include "vcs.h"
	
	SEG CODE
	ORG $FFC0

	REPEAT 32
	.byte 0
	REPEND

code	ldx #$0A	; 2
	inx		; 1
	pha		; 1
	bne code+1	; 2
fram	lda #%00111110	; 2
sync	sta WSYNC	; 2
	sta VSYNC	; 2
	lsr		; 1
	bne sync	; 2
	iny		; 1
	sty PF1		; 2
krnl	sta WSYNC	; 2
	dey		; 1
	dex		; 1
	sty COLUPF	; 2
	bne krnl	; 2
	beq fram	; 2

	ORG $FFFC

	.word code
	.word code

Edit: Added 2K version, as suggested by Zack

Attached Files


Edited by JeremiahK, Tue Sep 11, 2018 10:43 AM.


#10 iesposta OFFLINE  

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Posted Mon Sep 10, 2018 11:47 PM

Now wire up a diode cart.

Only needs to be half of the 64 byte one in this video!

 

Somebody make a parts list so we can build one as a kit project?

 

 



#11 SpiceWare OFFLINE  

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Posted Tue Sep 11, 2018 9:19 AM

Did y'all open an issue?

 

Screen Shot 2018-09-11 at 10.15.44 AM.png

 

And was are dumb misspelt to make it a 666 byte source file?

 



#12 ZackAttack OFFLINE  

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Posted Tue Sep 11, 2018 10:18 AM

It seems that 64B is the smallest possible program that runs in Stella, so here is my version, padded with first 32 zeroes, then the 32 bytes of code.

If you're going to pad it you might as well go for a full 2K. That way you can be sure it will run on harmony, uno, and any other programmable carts.

I tested yours and mine with uno and 7800 on a crt tv. Both of the demos appeared as they do in Stella.
 

Now wire up a diode cart.
Only needs to be half of the 64 byte one in this video!
 
Somebody make a parts list so we can build one as a kit project?


Maybe use DIP switches instead so it can be reprogrammed. As amusing and tempting as this is, it might be more practical to take everyone's demos and combine them with a menu program into a single cart. It could be a collection of demos and games that can be played with the cartridge removed since these will all fit in RIOT RAM.

#13 SvOlli OFFLINE  

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Posted Tue Sep 11, 2018 2:10 PM

You are thinking of LXA (opcode $AB). Unfortunately it is unstable. LAX however is stable, but yeah no immediate mode.

 

This opcode is unstable in all conditions but one. Due to the bus driven by more than one "writer" it can happen that someone else inside the CPU will toggle bits from "1" -> "0" (CPU is low-active). So LXA #$00 is stable, because there is no "1" that can be turned to "0".



#14 JeremiahK OFFLINE  

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Posted Tue Sep 11, 2018 2:25 PM

So you can clear all of zeropage, as well as A and X, in only 6 bytes:

        lxa #0
.clear  pha
        dex
        bne .clear


#15 SvOlli OFFLINE  

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Posted Tue Sep 11, 2018 2:42 PM

reset: ; @FFE4
; thanks to Omegamatrix
   ldx   #$0A     ; ASL opcode = $0A
   inx
   txs
   pha
   bne   reset+1  ; jump between operator and operand to do ASL

mainloop:
   lda   #%00111110  ; each '1' bits generate a VSYNC ON line (bits 1..5)
syncloop:
   sta   WSYNC
   sta   VSYNC       ; 1st '0' bit resets VSYNC, 2nd '0' bit exit loop
   lsr
   bne   syncloop   ; branch until VSYNC has been reset

kernelloop:
   inx
   stx   WSYNC
   stx   COLUBK
   bne   kernelloop
   bit   reset
   beq   mainloop

Here's my idea: 28 bytes, 36 leading zero-bytes. No illegal opcodes.

 

But I'm pretty sure that Thomas will be able to squeeze some bytes of the that code... ;-)

 

I tested it without executing the reset routine in Stella with randomizing all, and it still works, so I could spare some extra 7 bytes.

Attached Files



#16 Wickeycolumbus OFFLINE  

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Posted Tue Sep 11, 2018 3:01 PM

Now wire up a diode cart.

Only needs to be half of the 64 byte one in this video!

 

Somebody make a parts list so we can build one as a kit project?

 

 

 

 

Was going to post that when I saw this thread :)  There's some information about it in my old thread, but I never drew up any schematics.  I can give more info if anyone is interested. 

 

http://atariage.com/...for-atari-2600/

 

Shortly after doing that 64 byte cart, I designed and started building a 16 byte ROM with just transistors and diodes.  Probably have the ROM somewhere, don't remember exactly what it did.  I ended up giving up on the cart part way through building it because I discovered that I had damaged some of the MOSFETs (ESD?) while building it, and construction was very painful because I was handwiring SMD parts onto a board like the one in the video.  May go back to it some day, just thought it would be cool to have a cartridge with no integrated circuits :).

 

It's always fun to squeeze something into a tiny ROM.



#17 alex_79 OFFLINE  

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Posted Tue Sep 11, 2018 3:16 PM

I tested it without executing the reset routine in Stella with randomizing all, and it still works, so I could spare some extra 7 bytes.

Stella doesn't randomize TIA registers (not yet, but there's an open issue on github for that), so you might get vertical bars depending on the initial state of players and missiles if you don't initialize on real hardware


Edited by alex_79, Tue Sep 11, 2018 3:21 PM.


#18 Omegamatrix OFFLINE  

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Posted Tue Sep 11, 2018 5:32 PM

 

This opcode is unstable in all conditions but one. Due to the bus driven by more than one "writer" it can happen that someone else inside the CPU will toggle bits from "1" -> "0" (CPU is low-active). So LXA #$00 is stable, because there is no "1" that can be turned to "0".

Might be very useful then. :)



#19 Omegamatrix OFFLINE  

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Posted Tue Sep 11, 2018 5:39 PM

Okay, here is a demo I just made:

; short 32 byte demo, rev b
; by Omegamatrix

; last update Sept 11, 2018

    processor 6502
    LIST OFF
    include vcs.h
    LIST ON
    
    ORG $F800
    .byte $FF
    
    ORG $FFE0
    
Start:

;SP=$FD at startup
.loopClear:
    asl
    pha
    tsx
    bne    .loopClear
    
;RIOT ram $80-$F6 clear, TIA clear except VSYNC, SP=$00

.doVSYNC:
    lda    #$0E << 2       ; does two lines (non-Vsync), and then the regular 3 lines of VSYNC
.loopVSYNC:
    sta    WSYNC
    sta    VSYNC
    sta    CTRLPF          ; reflect for symmetrical PF2
    lsr
    bne    .loopVSYNC
    
    dex                    ; scroll color and shape
    
.loopKernel:
    sta    WSYNC
    dex
    stx    PF2
    stx    COLUPF
    dey
    bne   .loopKernel
    .byte $0C  ; NOP, skip 2 bytes
    
    ORG $FFFC
    .word Start
    beq    .doVSYNC        ; always branch

It's padded to make up the 64 bytes.
 
In the start-up routine I take advantage of the SP being at $FD, so it is a 5 byte clear. There was a thread a while back about the SP being at $FD at power on. That trick probably won't work if you are loading this rom through the harmony cart menu screen, as the SP might not be at $FD. If you flash the game as a single rom image then it should work. I haven't tested it on real hardware yet, but a single rom image would be important.
 
Attached File  short32_b.bin   2KB   44 downloads


Edit:
Originally I had the 5 line VSYNC like others have posted, and whether that worked or not was dependent on how tolerant your TV was. I have since changed it to a regular 3 line VSYNC with a couple extra lines of to make up the 262 total. I also redid the rom to be padded to 2K for ease of use.


Edited by Omegamatrix, Tue Sep 11, 2018 7:45 PM.


#20 Omegamatrix OFFLINE  

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Posted Tue Sep 11, 2018 7:35 PM

I made a new demo, with some sound! Not to sure what to expect or real hardware. If you try this make sure it is a single rom image on Harmony. :)
 

; short 32 byte demo, with sound!
; by Omegamatrix

; last update Sept 11, 2018

    processor 6502
    LIST OFF
    include vcs.h
    LIST ON
    
    ORG $F800
    .byte $FF
    
    ORG $FFE0
    
Start:

;SP=$FD at startup
.loopClear:
    asl
    pha
    tsx
    bne    .loopClear
    
;RIOT ram $80-$F6 clear, TIA clear except VSYNC, SP=$00

.doVSYNC:
    lda    #$0E << 2       ; does two lines (non-Vsync), and then the regular 3 lines of VSYNC
.loopVSYNC:
    sta    WSYNC
    stx    AUDC0+5,Y       ; write to each audio register
    dey
    sta    VSYNC
    lsr
    bne    .loopVSYNC
    
    tay                    ; Y=0
    dex                    ; scroll color and shape
    
.loopKernel:
    sta    WSYNC
    dex
    stx    COLUBK
    dey
    bne   .loopKernel
    .byte $0C  ; NOP, skip 2 bytes
    
    ORG $FFFC
    .word Start
    beq    .doVSYNC        ; always branch

Attached File  short32_sound.bin   2KB   42 downloads

 

 

Edit: added a modified rom padded to 2K for ease of use.

 


Edited by Omegamatrix, Tue Sep 11, 2018 7:47 PM.


#21 Omegamatrix OFFLINE  

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Posted Tue Sep 11, 2018 8:08 PM

I had a bug with the sound rom through the first loop, as Y is unitialized so you don't know what register it writes to.

 

Solution, flip Y and X, as X=0 after the clear loop. I also moved VSYNC right after WSYNC, so that it is more standard.

; short 32 byte demo, with sound! (rev b)
; by Omegamatrix

; last update Sept 11, 2018

    processor 6502
    LIST OFF
    include vcs.h
    LIST ON
    
    ORG $F800
    .byte $FF
    
    ORG $FFE0
    
Start:

;SP=$FD at startup
.loopClear:
    asl
    pha
    tsx
    bne    .loopClear
    
;RIOT ram $80-$F6 clear, TIA clear except VSYNC, SP=$00, X=0, A=0, carry is clear

.doVSYNC:
    lda    #$0E << 2       ; does two lines (non-Vsync), and then the regular 3 lines of VSYNC
.loopVSYNC:
    sta    WSYNC
    sta    VSYNC
    sty    AUDC0+5,X       ; write to each audio register
    dex
    lsr
    bne    .loopVSYNC
    
    tax                    ; X=0
    dey                    ; scroll color and shape
    
.loopKernel:
    sta    WSYNC
    dey
    sty    COLUBK
    dex
    bne   .loopKernel
    .byte $0C  ; NOP, skip 2 bytes
    
    ORG $FFFC
    .word Start
    beq    .doVSYNC        ; always branch

Here's the new rom:

 

 

Attached File  short32_sound_b.bin   2KB   48 downloads


Edited by Omegamatrix, Tue Sep 11, 2018 8:11 PM.


#22 almightytodd OFFLINE  

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Posted Tue Sep 11, 2018 9:08 PM

This is so awesome!

 

You guys are geniuses!



#23 Omegamatrix OFFLINE  

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Posted Wed Sep 12, 2018 12:22 AM

I made one more. Looks cool in Stella.

; short 32 byte demo (New Gold Dream)
; by Omegamatrix

; last update Sept 11, 2018

    processor 6502
    LIST OFF
    include vcs.h
    LIST ON
    
    ORG $F800
    .byte $FF
    
    ORG $FFE0
    
Start:

;SP=$FD at startup
.loopClear:
    asl
    pha
    tsx
    bne    .loopClear
    
;RIOT ram $80-$F6 clear, TIA clear except VSYNC, SP=$00, X=0, A=0, carry is clear

.doVSYNC:
    lda    #$0E << 2       ; does two lines (non-Vsync), and then the regular 3 lines of VSYNC
.loopVSYNC:
    sta    WSYNC
    sta    VSYNC
    lsr
    bne    .loopVSYNC
    

.loopKernel:
    sty    HMP0
    sta    WSYNC
    sta    HMOVE
    sty    GRP0
    sty    COLUP0
    dey
    bne   .loopKernel
    .byte $0C  ; NOP, skip 2 bytes
    
    ORG $FFFC
    .word Start
    beq    .doVSYNC        ; always branch

Here's the rom:

 

 

Attached File  short32_NewGoldDream.bin   2KB   61 downloads



#24 Omegamatrix OFFLINE  

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Posted Thu Sep 13, 2018 11:40 PM

I made a few more roms, and these were the better ones of them:

 

Attached File  short32_ACD.bin   2KB   52 downloads

 

Attached File  short32_Cubix.bin   2KB   55 downloads

 

Attached File  short32_DiskData.bin   2KB   52 downloads



#25 SvOlli OFFLINE  

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Posted Sat Oct 6, 2018 4:32 PM

So, my final result of 32 byte demo coding is now available here: https://xayax.net/hard2632/

More discussion after the demo party! :)






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