Atari on a breadboard project

[atariry]

Very recently I fished out my box of Atari chips stored from the mid 80's when I upgraded my NTSC 800 to a PAL 800 using the boards/parts from a PAL 400. Here is a picture of the goodies I never threw out!

 

 

So I have decided that my next project is to build a NTSC Atari on a set of plug in breadboards (already on order from Ebay). I have also bought a newer Sally CPU to avoid having to wire up several tristate buffers. My idea is to only have a single 64k RAM, and to use an Arduino (Teensy 3.5 which is 5V tolerant) to load the Atari ROMs into the RAM. I will add decode circuitry to "protect" the ROM addresses. I intend to use the Arduino to reset the 6502/Sally in order to write to the RAM by programming the I/O's of the Arduino. I was wondering whether I could hold the 6502 in reset (or hold Sally in the HALT state) while I access the RAM and peripherals. Now I think that there is a problem, that assuming I can write to the Antic and load the memory with a display list, in theory the Antic should generate a picture, but I now have the problem that Antic will assert its HALT output to grab the address in order to read the display list and screen data. I wanted to keep the interface between the Arduino and the Atari as simple as possible, just using the ability to tristate the Arduino ports once the RAM was loaded.

 

I have read a number of posts which state that the 6502 is dynamic. It sounds like if held in the HALT state for too long it will lose it's state. This is not a problem, as I think it might be better to simply hold the 6502 in reset and HALT in order to keep its data and address lines tristated. So I don't care about freezing the 6502 and resuming later, although that would be a nice way to debug/dump the memory using the Arduino. My question is whether Antic, GTIA, Pokey and 6520 need a continual phi0 clock signal to stop them losing their state. Are they dynamic too? I could make the interface between the Arduino and the Atari bus more complicated and just use phi0 cycles, like the 6502 does, but now the interface is getting more complicated, and I was hoping to keep the overall chip count as low as possible.

 

I will post more details as the project progresses.

 

---Atariry

[+mytek]

Not trying to dissuade you from your proposed project, but I couldn't help but notice that you only have 3 posts to your name, and a member for about 1 month, so perhaps you might not know about this: Atari 1088XEL Mini-ITX Motherboard

 

On that page there is a link to a guy (MacRorie) that will sell you just one board if you are interested.

[atariry]

@mytek thanks for the pointer to the 1088XEL project. I have read up about it and it is an impressive piece of work. Perhaps once I have finished my breadboard project I could go the 1088XEL route?

 

For the time being I have started on the breadboard project, even though the breadboards which I ordered from Ebay have not arrived. I am using a Teensy 3.5 as the master controller, whose purpose is to be fully decided, but I would like it to be able to poke and peek. This is made difficult by having to continuously clock theta2, so I am using a cheap Altera EPC2 board to interface between theTeensy and the Atari chips. I have temporarily wired up Sally (6502), GTIA and ANTIC. These came from the NTSC CPU board from my Atari 800 which I modified many years ago to to be a PAL 800 (I bought the 800 back in 1985 when I was in the USA). I am using the 2 PLLs on the EPC2 board to generate the 3.57MHz FOSC clock and I see it divided down by Antic to half the frequency.

 

The data bus and address busses are not wired up, but clocks and controls are. I use resistors to pull the 6502 databus to 0x8D, which executes as STA #8D8D, in order to see some writes. I see the line sync on the CSYNC pin of GTIA is active, but no sign of a vertical sync component, which I assume needs to come from ANTIC once it executes a display list. I also see bursts of 8 REF (refresh) from ANTIC. Interestingly at the same time as the REF bursts I see corresponding nasty low going glitches on the 6502 R/W pin just after the rising edge of REF. The REF bursts are repeated at line sync rate, which corresponds with details I have read in various postings to this forum.

 

BTW I nearly blew up the GTIA. I don't know if it is damaged, only time will tell. I will post the reason separately.

 

--Atariry

[ClausB]

Teensy boards are great! Easy to interface, easy to program, fast, cheap, and lots of memory. 5V tolerance makes them ideal for retro computers. I've done two projects with them, have one in the works, and more planned.

 

https://www.pjrc.com/teensy/techspecs.html