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SDD 99

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#26 ralphb OFFLINE  

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Posted Tue Nov 13, 2018 1:43 PM

The ability to load cartridge images from files is really cool, I assume it works for ROM carts only? What if you have a GROM only cart in the physical slot, could you still load a ROM cart from the SDD99? Do you also allow RAM mapping into the >6000 region using the SAMS mapping registers?

 

I'm glad you ask this :) , since GROM should be possible.  I already have some code, but I also need at least the GS line, which is currently not connected.  I'll try soldering a small wire and then we can see.

 

Regarding the mapping, no, I don't.  That's because the read request at >6/7xxx is always handled by the cart handler, and not by the memory handler.  It would be quite a hassle to change this, and I'm not seeing a real benefit here either.



#27 ralphb OFFLINE  

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Posted Tue Nov 13, 2018 1:46 PM

What's the pin connector for? Is it just the bus(44pin)?  

 

Good point!  The long double-pin row is only for debugging, and does indeed carry the signals of the bus.  I relied so heavily on my logic analyzer that I'm glad I had enough foresight to add this!  ;)​ 



#28 RXB OFFLINE  

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Posted Tue Nov 13, 2018 5:09 PM

 

 

I'm just guessing here, but with the insane size of the memory, the ability to load CARTRIDGES and his previous work on the FinalGROM, I'm thinking any BASIC in cartridge form should be loadable executable.

 

The ideas and possibilities are flooding into my head right now....

Turns out "NO"

 

Quote: "No, that's not my plan.  But subprogram parameter parsing in XB is somewhat different than in BASIC, and I haven't implemented those changes yet."

 

So currently it is not compatible with XB at all  yet.


Edited by RXB, Tue Nov 13, 2018 5:13 PM.


#29 arcadeshopper OFFLINE  

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Posted Tue Nov 13, 2018 6:10 PM

 

Good point!  The long double-pin row is only for debugging, and does indeed carry the signals of the bus.  I relied so heavily on my logic analyzer that I'm glad I had enough foresight to add this!  icon_wink.gif​ 

 

I'm glad too, as then I can hook a TIPI up there.. where are you getting 5v?  from the TI?  what if a speech is in there..



#30 ralphb OFFLINE  

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Posted Wed Nov 14, 2018 2:06 PM

 

I'm glad too, as then I can hook a TIPI up there.. where are you getting 5v?  from the TI?  what if a speech is in there..

 

That won't work, as the pins are not in order.

 

Power remains to be seen.



#31 RickyDean OFFLINE  

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Posted Wed Nov 14, 2018 3:04 PM

 

That won't work, as the pins are not in order.

 

Power remains to be seen.

Home made adapters will rule the world!!



#32 acadiel OFFLINE  

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Posted Wed Nov 14, 2018 9:16 PM

 
I'm glad you ask this :) , since GROM should be possible.  I already have some code, but I also need at least the GS line, which is currently not connected.  I'll try soldering a small wire and then we can see.
 
Regarding the mapping, no, I don't.  That's because the read request at >6/7xxx is always handled by the cart handler, and not by the memory handler.  It would be quite a hassle to change this, and I'm not seeing a real benefit here either.


How does the Pgram derive that signal from the side bus to operate?

#33 ralphb OFFLINE  

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Posted Thu Nov 15, 2018 1:42 PM

Home made adapters will rule the world!!

 

This is not an adapter, this is for debugging.  :roll:



#34 ralphb OFFLINE  

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Posted Thu Nov 15, 2018 1:54 PM

How does the Pgram derive that signal from the side bus to operate?

 

Please forget that I ever mentioned GS*!  :)   Of course there's neither GS* nor GR on the side port.  But GS* is just a combination of address lines, so it can be replaced by checking for the address, which I'm doing anyway.  The GR line is more critical, but I remember speccery doing his FPGA sideport thingy without it.  And in fact, it's sufficient that all the other GROMs in the system do their GR business, as the SDD 99 is fast enough to provide the data in time.

 

 

Still, I spent the entire evening trying to figure out why Parsec won't run once a key on the title screen is pressed.  Only just now have I noticed that it does work when I do a soft reset at that point.  This implies that neither Parsec nor I reset the scratchpad RAM properly, but this can be fixed.  :)



#35 Opry99er OFFLINE  

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Posted Thu Nov 15, 2018 3:06 PM

Salivating over that DOS. :)

#36 RickyDean OFFLINE  

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Posted Thu Nov 15, 2018 3:06 PM

 

This is not an adapter, this is for debugging.  :roll:

Well, if I understand you correctly, the side signals can be accessed by these pins, correct? If that is so then a homemade adapter that can access these pins to have an endpoint that is like the side port on the TI could be made and therefore accessed for more than debugging? 



#37 ralphb OFFLINE  

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Posted Fri Nov 16, 2018 10:05 AM

Well, if I understand you correctly, the side signals can be accessed by these pins, correct? If that is so then a homemade adapter that can access these pins to have an endpoint that is like the side port on the TI could be made and therefore accessed for more than debugging? 

 

Absolutely!  :)   Sorry, I somehow misunderstood your post.



#38 chouimat OFFLINE  

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Posted Tue Nov 20, 2018 7:01 AM

I want 1



#39 RickyDean OFFLINE  

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Posted Tue Nov 20, 2018 10:20 AM

Waiting with bated breath... :grin:







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