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Member Since 21 Aug 2008
OFFLINE Last Active Today, 10:10 AM

Posts I've Made

In Topic: Joe Blade NTSC version?

Today, 9:58 AM

Possible fix:


Attached File  joe-blade-ntsc-fix.xex   30.5KB   5 downloads



  • Replace an instance of LDA VCOUNT / BNE with LDA $14 / CMP $14 / BEQ. That way it isn't thwarted when the VBI runs long.



Attached File  joe-blade-ntsc-fix.zip   775.95KB   0 downloads


I'll take a look at Joe Blade II.

In Topic: Joe Blade NTSC version?

Today, 4:25 AM

I made an attempt at NTSC-fixing and converting the original CAS to an XEX:


Attached File  joe-blade-ntsc-fix.xex   30.48KB   12 downloads



  • Move long immediate VBLANK routine into deferred routine
  • Insure proper initialization of DLIs when switching from bomb screen to main screen
  • Disable BASIC



Attached File  joe-blade-ntsc-fix.zip   750.81KB   4 downloads

In Topic: "The Graphic Demo" in NTSC?

Tue Nov 14, 2017 11:15 PM

I took a shot at NTSC-fixing the original demo:


Attached File  graphic-demo-ntsc-fix.atr   90.02KB   15 downloads


  • Shorten the kernel on the top of the screen so it doesn't eat up so much CPU time
  • Move the computation of rainbow colors into the kernel itself instead of as a separate loop
  • Clean up the bottom border so that the color change is stable (only visible on extended PAL height)

Messy patch code:


Attached File  graphic-demo-ntsc-fix.asm   4.91KB   9 downloads

In Topic: how many CPU cycles in a scanline?

Thu Nov 9, 2017 11:28 AM

There's no difference in the number of cycles per line between PAL and NTSC. When DMA is disabled, DRAM refresh always consumes 9 cycles. The only time refresh takes fewer cycles is on "badlines" where some of the refresh cycles are blocked by character set index lookups depending on the width of the screen and the HSCROL status. See the timing diagrams in the Altirra Hardware Reference Manual for precise timings.

In Topic: how many CPU cycles in a scanline?

Thu Nov 9, 2017 11:06 AM

I second what flashjazzcat said. You can see all refresh and DMA cycles in Altirra by pressing Shift-F8. If you do that when DMA is completely disabled you see the following pattern:


Attached File  refresh.png   996bytes   1 downloads


Notice that the positions of the DRAM refresh cycles correspond to the area where your bars are distorted.


Maybe you could even out the bars by intermixing ST* ABS, ST* ABS,Y and STA (ZP),Y instructions to adjust the width by one or two cycles at opportune moments since those take 4, 5 and 6 cycles respectively. You could also get 7 cycles if you force a page boundary to be crossed.