TInaut

Try http://ftp.whtech.com/programming/Extended Basic/XBII+_Manual_ITA.zip

My guess is the wait state (ready) logic or relevant DSR code. The non-Myarc FDC's implement wait state logic on the data ports when reading/writing bytes to/from a floppy disk. SBO 2 enables, SBZ disables. The 9995 prefetch of the MOVB @>5FF6,Rx after SBO 2 may execute too fast for wait state circuit to activate in time on real hardware. With the Myarc DDCC, the DSR polls the 1770 for byte ready before accessing >5FF7. IIRC, the 1770 ports are mapped to odd bytes. This odd-byte mapping has the advantage that it gets on the 99/4A 8-bit bus first. The Geneve is fast enough to use the polling technique for all FDC's.

There is also the TIC compiler written by Al Beard (LGMA), who also wrote the 99/9640 ForTran compilers. I think there were native versions for Geneve, Amiga, and MS-DOS. Beery Miller may have more info.

Bought my 99/4A at Service Merchandise in 1982 for $299 plus $100 rebate. In 2002 they closed down. I had saved my allowance and lunch money for 5 years to make that purchase. Then I bought 6 modules to get the free Speech Synthesizer. I recall I bought Parsec, Alpiner, TE II, XB, Mini Memory, and Tunnels of Doom to get speech. I needed a cassette recorder, so I got the Panasonic. TI Folly? After that I got the Percom SSSD disk controller and drive with DM 2, Tachyon 32K, and Ultracomp RS232/PIO. Until 1985, I was using this system on a B&W TV. Really, some of us did not have Color TV in 1985.

IIRC, Art Green's assembler/linker package handled the memory mapping functions of the SAMS. Brad Snyder's XB Packer used the 128 Meg board to store 4 different XB environments -- or something like that. In my inventory of IC's, I show 4 of the 74LS612 memory mappers, not including the one on my 286 XT that I keep for running MFM hard drive diagnostics. Is the '612 hard to find? It probably is at my house, but I know the 1000 cubic foot area where the 4 reside. I have not needed the '612 in 20-odd years, and I will not waste my time looking for them if they are easily obtained, but I will donate them to the project if I find them.

Yes, that is how I count them. All the Format I instructions have clock cycles C=14, memory cycles M=4, except for instructions C and CB, which have C=14 and M=3. This is according to the data sheet, which is at the ftp site and elsewhere: ftp://ftp.whtech.com/datasheets%20and%20manuals/Datasheets%20-%20TI/9900DataSht.pdf Oh, well. I got carried away and assumed that C(B) would follow the same sequence as the others, because there is no penalty except delay in writing the destination operand unchanged. I think having MOV be C=14 and M=3 would have been my choice to optimize microcode rather than shaving a memory cycle from C(B). In any event, the MOV(B) and SOC(B) can be used when source and destination addresses are the same to preserve the contents when it is RAM or to bank ROM. SOC(B) should have been OR(B), unless I am missing more grey matter. The 9900 has ORI.

An exception to the 9900 Format I instructions -- C only has 3 memory cycles. It is a special case, but it would have worked had it simply wrote out the destination operand during the last memory cycle. In fact, even with 1 less memory cycle, the shared microcode may have an incomplete write cycle at C completion. Someone with real 99/4A would have to check. I think you are right, and I am wrong, until someone proves otherwise.

Because you are going to restore contents @>6000 and you are trying to keep BOOT to 6K, unless you are trying to preserve status bits, none of which CLR affects, use "MOV(B) @>6000,@>6000" or "C(B) @>6000,@>6000" or "SOC(B) @>6000,@>6000". I prefer the SOC(B) option. The C(B) option will always set the EQ bit of the status register and clear higher and greater bits. The MOV(B) and SOC(B) options will affect higher, greater, and equal bits by comparing destination results to 0.

A vinyl or shellac on a laser turntable is possibly the best experience for preserving the record and presenting the sound.

Do you have the 5.25-inch floppy disk oriented correctly? There is a notch in one side of a (non-flippy) disk. If the disk is inserted into a horizontally mounted drive, the notch should face left or face right in the drive close to the front edge -- I.e., if you pull the disk out about an inch, you should see the notch. Similarly, if the drive is mounted vertically, the notch should face up or face down close to the front edge.

Not that it answers your questions, but the CATXX folders were the catalogs/categories of files on the 9640 New BBS that Beery Miller ran. FILES.BBS in each CATXX is an 80-column text file with file descriptions of the files in that catalog. FILES.40 is the 40-column text version. 9640 News was also a diskazine sold by Beery Miller.

Maybe I drive and rent out the passenger seat, back seat, and trunk. Includes drive-through BK breakfast. CD player available at $5 per hour. Passenger seat: $129. Back seat: $199, 2 adults plus child. $149 without child. $119 each adult. Trunk: $39 per person.

I recall that the 9918 and 9918A are pin-compatible. The later 9118 is slightly different. I could be wrong, but I think the DRAM interface is one of the characteristic differences. On the 99/4A, there is I recall a 74LS04 missing from the board but in the design which allows the 9918 be used instead of the 9918A.

To clarify, the 80-track upgrades allow drive(s) up to 80 tracks per side via the DSR. If you put a 40-track drive at an 80-track position, but alway treat it as 40-track, it will work fine. I.e., as long as you put a 40-track disk written in a 40-track drive attached to an 80-track position, it will work. If you put a 40-track drive at an 80-track position, as long as you always format at 40 tracks or less, it should work. If you format a 40-track drive drive to 80-track, the 40th track (track 39, count starts at 0) gets overwritten 40 times with tracks 40 through 79. What you are left with is a disk with tracks 0 to 38 and 79. The 80-track upgrades to the TI controller behave differently to the 80-track Myarc controllers. The TI upgrades do not double step. The Myarc 80-track options double step to allow reading of 40-track disks in 80-track drives.