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drac030

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drac030 last won the day on July 26 2016

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About drac030

  • Birthday 07/28/1970

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  1. As far as I can tell from the emulation, the worst problem with the 80-column board is that its firmware is utter cra.... very alpha, that is. Without thourough rewrite there is little hope that it would work reliably on broader scale.
  2. Does .ALLW imply/execute REP #$30 and .ALLB - SEP #$30? If so, then you are first pushing the P register status onto the stack (PHP in the first line), then you are pulling "CALLER RETURN", but in fact you are pulling the P byte + a part of the return address with that? Then the next PLA gets the other byte of the return address instead of the P register byte. These need to be swapped, PLA-byte first to get the P register status, then PLA-word next to get the return address, no?
  3. It should be $3C52, but it is $3152. So the question is: is acc really 16-bit at $A8D3? Especially if the JSR is being done "IN NATIVE 8/8 MODE"...
  4. That's COMMAND.COM which ends at $2B6C. Worry not, it gets unloaded before starting programs.
  5. MEMLO is where the MEM reports. What is missing in the equation, is the X.COM, which is used to load legacy binaries and which is taking up some memory too. It loads bulk of its code to ext RAM, but when there is no place there, it falls back to the main RAM, raising the memlo enormously.
  6. It seems that there is a minor mistake in the build scripts and Supercart images are built with SIDE2 id instead of the Supercart id. But it is only a visual glitch, as the pass-through code is there, as indicated by XVER and by the fact that it works, as you say. The important part is "pass-through", as Supercart is basically a SIDE2 clone with a cart port added (and without the CF connector), so as far as the cartridge itself is concerned, they are compatible. So no, there is no need to reflash, unless you want a newer version or so. Most today's cartridges are flashable, I cannot think of anything now, that is not.
  7. That is probably the first game ever which behaves like a productivity application. It runs from a DOS (SDX here), then cleanly exits back. I am impressed. I ran it on Rapidus - it worked without any problems. Display: PAL CRT here, no glitches, everything good. And it all looks beautifully. Congratulations.
  8. The snippet of code I quoted suggests otherwise: JMP ($0a) when executed by XIO 40 under BASIC is supposed to exit the interpreter and return the control to the CP. An attempt to resume a BASIC session later will result with what I wrote. But in fact, there is a bug in current SDX revisions and such a JMP ($0a) will hang. I have already committed a fix. That is not true anymore for any DOS which implements XIO 40. Sure, RTS *technically* returns to "DOS". But, since a program is executed effectively by a JSR, it returns to the binary loader, and the binary loader, when invoked as XIO 40 - returns to the calling application. Whereas JMP ($0a) aborts the program and returns the control to the DOS UI itself. It also works so during loading a program: an RTS from an init segment returns to the loader and continues loading, JMP ($0a) aborts it. Care to exemplify?
  9. Your program will ruin the BASIC state, because $80 is a part of the lomem vector, pointing to the lowest memory available to BASIC. It is a pretty essential variable. Next, under SDX, jmp ($0a) returns the control to the DOS, which normally will save (swap out) the BASIC's memory, including addresses $80-$FF, to a file pointed to by the environment variable $BASIC$. It by default points to the ramdisk. Later, when you are trying to re-enter BASIC, the memory will get swapped back in before handing the control to BASIC. Of course, it will restore the last state, in this case, the faulty one. To force a cold restart of the BASIC interpreter, do BASIC /I from the CP prompt. Also lookup the User's Manual for more details.
  10. It seems that in IDE+ emulation the emulated ATA controller does not react correctly to the ATA command $40 (READ-VERIFY). When fed with it, it just enters the BUSY state and that is it. To reproduce, run CLX with /SV switches (scan for bad sectors / use Verify sector command). When I poke a $40 to the COMMAND register, poking something else there seems to restore normal operation (or at least clears the busy bit). However, as it is on the pic, it hangs irrecoverably and only clicking "Cold reset" in the menu gets it back to normal.
  11. It looks like the (or a) fix was already posted here: http://www.atari.org.pl/forum/viewtopic.php?pid=291400#p291400 So it just may be a question of preparing a final revision and putting it at the URL where the SDX build scripts are fetching it from. As about the APT specs, if a section is ambiguous, one can always make a suggestion on how to rephrase (I am probably opening a can of worms here).
  12. In fact, @flashjazzcat is one of the main authors of this specification. Yes, it was I who wrote it, but it was preceded by a quite lengthy discussion on PM among several people who had been invited to discuss the details. That was the phase of the theory, and later it was implemented in practice, i.e. in SIDE/U1MB and IDE+ (this is why there is data interchangeability between these two interfaces). Also, @flashjazzcat wrote his FDISK according to all these specifications. The phase of "asking questions" which was mentioned above was, I believe, the implementation phase, where we were clarifying any details which seemed vague then. It also resulted in multiple revisions of the text, as you can see in the PDF, the document underwent about 20 revisions. So I am genuinely curious what can be ambiguous there after all this process.
  13. None, I think, but there is a software driver for SpartaDOS X.
  14. Check the value of RMARGN, PEEK(83). 40 columns, RMARGN = 39. 64 columns, RMARGN = 63. 80 columns, RMARGN = 79.
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