Great Exploitations

Hi there!

 

Also, I have one free macrocell on the 22V10, so I might be able to do F4+SARA as an option.

 

So F4+SC (Fatal Run) is the upper limit? No chance for F0+SC?

 

I thought during the process of Homestar Runner RPG development, a standard F0 design was finished by Pixels Past.

 

So for my G'n'G project I'd be stuck with a descission between F0 or F4+SC

 

Interesting... Their *powers* should be almost equal. Anything that requires 128 bytes of extra RAM should also be doable with 32K extra ROM, no?

 

Greetings,

Manuel

Hi there!

 

Also, I have one free macrocell on the 22V10, so I might be able to do F4+SARA as an option.

 

So F4+SC (Fatal Run) is the upper limit? No chance for F0+SC?

Well, I won't know for sure until I try it. But I suspect that F4+SC is the upper limit if my design cannot be optimized enough. I think that F0+SC would just need one more macrocell, so maybe.

 

However, if you are willing to accept another limitation, F0+SC might be possible as is.

 

A real SARA chip has limitations, in that you can't use read-modify-write instructions on the RAM like INC, ROL, and others, and supposedly you can't execute code there (though I don't really see why not. Maybe you can with mine - I won't know for sure until I try, or someone tells me why not.)

 

Perhaps I could free up a macrocell or two by removing support for a indexed writes that do not cross a page boundary. So STA F000,x wouldn't work, but STA $EFFF,x would - just remember to adjust your index accordingly. For a new cart, it might be worth it to get an extra 32k of ROM.

I thought during the process of Homestar Runner RPG development, a standard F0 design was finished by Pixels Past.

 

So for my G'n'G project I'd be stuck with a descission between F0 or F4+SC

 

Interesting... Their *powers* should be almost equal. Anything that requires 128 bytes of extra RAM should also be doable with 32K extra ROM, no?

Almost everything - I'd imagine that there are some things that you could do with F4+SC and not with F0, like a bitmapped display or possibly self-modifying code, for instance...

Hi there!

 

However, if you are willing to accept another limitation, F0+SC might be possible as is.

 

Hm... I'd go for maximum compatibility. First the design should flawlessly run anything from Elevator Action to Dig Dug to Crystal Castles to Stargate to Secret Quest to Fatal Run.

 

Once that is secured, anything else on top of that would be "nice to have", though I'd personally prefer F0 + "regular" SC over F4/6/8 + SC with extended access possibilites

 

Greetings,

Manuel

Hi there!

 

However, if you are willing to accept another limitation, F0+SC might be possible as is.

 

Hm... I'd go for maximum compatibility. First the design should flawlessly run anything from Elevator Action to Dig Dug to Crystal Castles to Stargate to Secret Quest to Fatal Run.

 

Once that is secured, anything else on top of that would be "nice to have", though I'd personally prefer F0 + "regular" SC over F4/6/8 + SC with extended access possibilites

 

Greetings,

Manuel

Compatibility was my goal, thus the extra effort to allow indexed writes, since chances are good that the games use these. So F8/F6/F4+SC should work with existing games if I've done it right. (Well, I still need to check to see if F4+SC will fit.)

 

I just tried playing around with EF (I looked it up - F0 is for Megaboy, EF is Paul Slocum's thing) and it looks like there's enough macrocells but not enough pins on the chip. So you should be able to get indexed writes for full compatibility with existing F8/F4/F6+SC games, but EF+SC would have limitations on indexed writes. Since no existing games use EF+SC, it might not really matter.

 

Actually, if you are going to a new bankswitching scheme anyway, you could get 256 bytes of RAM in the EF scheme with only minor changes.

Hi there!

 

I just tried playing around with EF (I looked it up - F0 is for Megaboy, EF is Paul Slocum's thing)

 

Ooopsa... I thought that was one and the same... I guess I need to do some more research first before continuing the discussion

 

Basically my personal "dream" end result would be the logical progression from F4+SC to 64K ROM (+SC!).

 

So that I could start development within Fatal Run specs, and in case of emergency just be able to double the ROM size.

 

Greetings,

Manuel

Hi there!

 

I just tried playing around with EF (I looked it up - F0 is for Megaboy, EF is Paul Slocum's thing)

 

Ooopsa... I thought that was one and the same... I guess I need to do some more research first before continuing the discussion

 

Basically my personal "dream" end result would be the logical progression from F4+SC to 64K ROM (+SC!).

 

So that I could start development within Fatal Run specs, and in case of emergency just be able to double the ROM size.

 

Greetings,

Manuel

Mini-update: I just tried F4+SC, and it fits on the chip. Still no luck with EF+SC.

Hello, I sent you out 4 SRAM chips yesterday at lunchtime. I don't know how fast the postal service is, but you should have them soon.

Hello, I sent you out 4 SRAM chips yesterday at lunchtime. I don't know how fast the postal service is, but you should have them soon. 

Thanks for the chips Hopefully I'll be able to build a prototype soon.

 

Another mini-update:

 

I found a way to get EF+SC on the chip if I add a couple of diodes and a resistor to the board. The diodes and resistor would act as a wired AND of A5 and A6, freeing up the pin needed for EF+SC.

 

I don't want to make 4 separate boards, but since standard 8k, 16k, 32k and 64k EPROMS all have 28 pins, it should be possible to make one standard board that could support all of the above - you'd just program the 22V10 differently and use a different EPROM for each. But I'd need the diodes and resistor on all of the boards unless I can think of another solution.

 

Well, I did think of another idea to get EF+SC without diodes but I don't know if it will work. it's something I'll try at the prototyping stage.

Hi there!

 

I'm thrilled! This is sounding better every day!

 

Greetings,

Manuel