ClausB

I'm glad to see I was wrong in estimating the interest level. Thanks for the encouragement!

Not really. It is synced merely because the SRAM sees the same address that ANTIC puts out for its video, except for the one bank bit. The AA rainbow picture above was drawn by a simple BASIC A+ program with a few pokes to manage the banks, the display list, and the OS bitmap pointer. The diode, in series with a resistor, sums the LSTTL output into the composite video signal. The diode allows a high output to increase the luma level but prevents a low output from decreasing the GTIA luma. Kind of like an open-collector output but inverted. Due to the low interest here lately, I think I'll just finish Stage I with the 80-pixel, 16-level mode. Combined with the GTIA 16-hue mode, it will display 256 colors without flicker. If that does not rekindle the excitement, then I'm done.

Yes, it is still based on an old OSS bank-switched EPROM cart, but there is now a perf-board hanging off it. I may post a photo but MetalGuy might laugh at it. Here's the prototype. The SRAM fits the OSS EPROM socket electrically, but not so much mechanically, so I bent up its pins on one side and extended them with half a socket. The added NAND gates handle the writes and the half-cycle bank switching. The perf board holds the shift register with room for more circuitry. The clip lead routes the enhanced luma to the composite video connector. The cart extender I made long ago for copying carts serves two purposes now. It raises everything out of the XL cart bay and it deselects the SRAM on bootup because the OSS cart powers up in a way the OS doesn't like. That problem is just with the prototype. The final version won't need an extender.

Nice collection! I don't see the A.C.E. carts in the list. We did three 80-column carts back in the day: DT-80 dumb terminal for the ATR-8000 (left cartridge) ACE-80 screen editor for Atari 800 (right cartridge) ACE-80XL screen editor for all Ataris (left cartridge) This post has a photo and the thread has more info: http://www.atariage.com/forums/index.php?s...t&p=1507756

Just finished cleaning my nephew's old 800. Dishwasher worked well. I even put all the keys in the silverware basket and tied a rag over the top so they wouldn't fly out. Now they're shiney again. When I put it back together, I found some of the keys are intermittent. Looked at the back of the keyboard with a magnifier and saw many broken solder joints - little dark circles around the pins. I'll have to resolder them. Anyone seen that before? Wondering if it's common or if this unit was temperature stressed or pounded too hard or something.

Best looking PC yet! Nice idea. Does your XE double as the PC keyboard?

So, are any of you interested in participating in a challenge like this?

It is about 8.6 color clocks.

Yes, taking the 1.8 MHz clock from the cart port. Yes. It requires programmer discipline (oh, no). Exactly. Just as shown in the diagram, I nand phi2 with a bank select bit, so the SRAM does two read cycles in one machine cycle. Even during a write to SRAM, the circuit will read the SRAM during the first half. That should be no problem because the 6502 does not drive data until the second half, after phi2 goes high. Whenever the CPU reads or writes SRAM, the circuit triggers and loads the shift register and puts sparkles on the screen. That's where the programmer discipline comes in. A future version would have a disable bit to prevent sparkles. That's good to know. This SRAM is 20 ns. It's a former 80486 cache RAM. I think it's happier doing this job than running Windows! However, it might be too fast. The theoretical timing of the data transfer from SRAM to shift register is marginal, although it appears to work. I need either a slower SRAM or a faster shift register, or a more advanced timing circuit. I do plan to bring home a scope from work and check out all the critical timings.

Yes, it is still based on an old OSS bank-switched EPROM cart, but there is now a perf-board hanging off it. I may post a photo but MetalGuy might laugh at it.

7500!

It is synchronized because it is always accessed during the first half of each ANTIC DMA cycle. It is exactly repeatable so there is no jitter, but it is not precisely aligned. The previous photo shows the 8 color clock offset (due to ANTIC & GTIA processing pipeline) but it appears not to be exactly 8 - there is a slight misalignment between SRAM pixel edges and GTIA pixels. I'll try to measure it more precisely. I have no buffer between the SRAM and the bus. So, even though the SRAM itself is fast, I don't know whether it can drive the entire data bus quickly enough to squeeze more SRAM access cycles into one half of a machine cycle, which is about 280 ns. I think it depends on bus capacitance. I don't know how to calculate that - I would just have to experiment with it. If it becomes a problem, then a gated buffer could fix it.

The photo above might be interesting from a technical point of view, but it's not at all pretty. Here is a preview of the enhanced luma overlaid with GR.11 color bars. Pretty?

Sure. This is what I envision for Stage I, which has two banks, one for ANTIC and one for enhanced luma. It will have an 8-bit shift register, a 7.2 MHz clock, and up to 3 modes: 80 horizontal pixels of 16 brightness levels; 160 pixels of 4 levels; 320 pixels of 2 levels. Of course, these all overlay the regular ANTIC/GTIA display. The first mode is like an extra GR.9 mode. When overlaid on a GR.11 screen, 256 simultaneous colors would be available, without DLIs. The last mode is like an extra GR.8 mode. Stage II would use three banks, a 14.3 MHz clock, and a 16-bit shift register. Possible modes are: 160 horizontal pixels of 16 brightness levels; 320 pixels of 4 levels; 640 pixels of 2 levels. The last mode could provide clear 80-column text with background colors provided by ANTIC/GTIA. Stage III could use all four banks and a 24-bit shift register, if the Atari data bus can be switched that fast. Among its modes could be 160 horizontal pixels of 64 RGB-like colors (2 bits per R, G, and B, encoded into NTSC). I hope to finish the Stage I prototype with discrete logic. Stage II might fit into a small CPLD. What I have so far is only 1/4 of Stage I, as only 2 bits per byte of SRAM are displayed, and the clock is only 1.8 MHz, but it proves the concept of time-multiplexing the data bus during DMA.

More progress: Added an 8-bit shift register to capture the SRAM output. Have not yet added a faster clock, so pixels shift out at 1.8 MHz, giving only 80 horizontal pixel resolution, i.e. 2 color clock wide pixels. See the photo: Diagonal lines on a GR.8 screen. Identical lines were drawn in two banks of the SRAM. One bank goes to the shift register in the first half of the machine cycle; the other bank goes to ANTIC during the last half. The darker lines are ANTIC's and they're delayed about 8 color clocks from the brighter lines from the shift register. The crossing line was drawn only in ANTIC's bank, just to prove the banks are different.

Well, Winter just returned and granted me a reprieve, so I took the time and did experiment #1. I put a 150 ohm resistor and a signal diode in series between the 74LS175 output and the TV's composite video input, and it works! See the photo (sorry for the bad photo but I had to angle down to avoid reflections). The text shows the loop that is running. The lighter-colored blocks and lines show when the LS175 flip-flop output is high (turned on by STA $D504 and off by STA $D500). They are skewed and stretched by ANTIC DMA timing, but that does not matter for this experiment, which just shows that the summing works. I tried several resistor values. Smaller ones made brighter blocks and larger ones made dimmer blocks, as you might expect.

If you 2600 programmers want to apply your methods to an 800, check this out: http://www.atariage.com/forums/index.php?s...t&p=1719107

Let's see whether we spoiled 8-bit programmers can think like a 2600 programmer. Can you write a nice game program for the 8-bit that doesn't use ANTIC? That's right, no DMA! The CPU must feed the GTIA PM registers itself, just like a 2600. Sound like fun? GTIA without ANTIC is similar to the 2600 TIA. TIA has 2 8-bit players (plus up to 4 automatic horizontal repeats); GTIA has 4 8-bit players (which can be horizontally repeated by the CPU). TIA has 2 1-bit missiles plus a 1-bit ball; GTIA has 4 2-bit missiles. TIA has 20 bits of playfield plus 20 repeats; GTIA has no playfield without ANTIC. In total, TIA has 39 bits of graphics and GTIA has 40. The 800's CPU is faster than the 2600's, but you'll need more CPU cycles to generate a playfield and repeat players. The 2600 has only 128 bytes of RAM, shared between the zero page and the stack! And the program ROM is only 4K. It also has 2 sound channels, a timer, a few switches, and two game ports. Proposed rules: - Can't read or write any ANTIC registers, except you must write 0 to DMACTL and NMIEN, and you may write WSYNC and read VCOUNT. - Must disable all interrupts, including VBI. - May only use the upper half of page zero RAM, and you may use the stack, but only as a stack. - The program may occupy 4K of RAM but may not write to that RAM. It must not call any OS routines. - May use only 2 8-bit POKEY voices and 1 timer. No keyboard input except for START, SELECT, and OPTION. - May use 2 joysticks or 4 paddles. Did I miss anything? Are these rules fair? Is this worth doing?

Sweet! Nice work.

I've read that the pros used to get 6 months.

Well, I'm thinking about doing a game like this, but I'm slow. Maybe end of the year?

Maybe you could learn the 800 and port your game for this challenge?

Let's see whether we spoiled 8-bit programmers can think like a 2600 programmer. Can you write a nice game program for the 8-bit that doesn't use ANTIC? That's right, no DMA! The CPU must feed the GTIA PM registers itself, just like a 2600. Sound like fun? GTIA without ANTIC is similar to the 2600 TIA. TIA has 2 8-bit players (plus up to 4 automatic horizontal repeats); GTIA has 4 8-bit players (which can be horizontally repeated by the CPU). TIA has 2 1-bit missiles plus a 1-bit ball; GTIA has 4 2-bit missiles. TIA has 20 bits of playfield plus 20 repeats; GTIA has no playfield without ANTIC. In total, TIA has 39 bits of graphics and GTIA has 40. The 800's CPU is faster than the 2600's, but you'll need more CPU cycles to generate a playfield and repeat players. The 2600 has only 128 bytes of RAM, shared between the zero page and the stack! And the program ROM is only 4K. It also has 2 sound channels, a timer, a few switches, and two game ports. Proposed rules: - Can't read or write any ANTIC registers, except you must write 0 to DMACTL and NMIEN, and you may write WSYNC and read VCOUNT. - Must disable all interrupts, including VBI. - May only use the upper half of page zero RAM, and you may use the stack, but only as a stack. - The program may occupy 4K of RAM but may not write to that RAM. It must not call any OS routines. - May use only 2 POKEY voices and 1 timer. No keyboard input except for START, SELECT, and OPTION. - May use 2 joysticks or 4 paddles. Did I miss anything? Are these rules fair? Is this worth doing?

Whoa. Sorry, coffee too strong this morning. Hope I didn't come off as a "brown, round part" myself.

WTF is a "hard drive"? Aren't all drives hard? The last time I took a floppy disk drive out and banged it on the table, it dented the table and hard pieces of plastic broke off. I think it's the disk (the round, brown part) that's floppy. Try this: poke a floppy disk with a screwdriver and it see that it just kind of flops around. Now, open up a hard disk drive and poke the disk (the brown, round part) with a screwdriver. It doesn't flop. Now bang it with the screwdriver. It makes a sharp clink, like hard metal. So it's the disk that's hard or floppy, not the drive. If you're too lazy to say "hard disk drive" then say "hard disk" like we all said in the early 80's when we could not afford one. And since "floppy disk" can be shortened to "floppy", you can say "floppy drive" because it's a drive for a floppy, even though it's hard. But don't say "hard drive" because it's not a drive for a "hard". "Hard drive" came from the non-techie PC user base. Tech savvy folks like us should not lower ourselves to that level! Mumbling rant continues off-line...