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Hi Louis, do you still have your articles on road engines? I notice you've moved domain but I don't see those articles there. (Anyone else have an archive copy??)

There's a bigger photo of this display at https://www.flickr.com/photos/patrick_c/18801118755/sizes/h/ I was there yesterday... the white machine is an unnamed Soviet Spectrum clone.

Glad you like it John! I did some of the work on that. You can pass in your code in a URL if you like: http://visual6502.org/JSSim/expert.html?graphics=f&steps=99&a=0&d=d8a9058520a903652085304c0000 We have a 6800 model nearby. Cheers Ed

Time moves on, and now Javascript can do a solid job of retro emulation - there's a big collection at http://archive.vg/blog/12-feature/114-a-big-list-of-browser-based-emulators-and-ports-of-classic-games Cheers Ed

I've finally started to flesh out our visual6502 wiki page on interrupt timing. It's a work in progress - my feeling is that we can certainly collect simulation URLs which illustrate interesting situations. We might be less definitive in explaining what's going on in words. Comments and suggestions welcome. Cheers Ed

Hi! I'm pleased to say that I've recreated this situation on the visual6502 transistor-level simulator. We've recently made a few changes to make it possible to experiment with exact timings and instruction streams. The URL you need is something like this. It's not too hard to modify these URLs for experimentation, although I know they look ugly. We've got some online docs for how they work. I plan to write this NMI/IRQ collision up on our wiki in our collection of curiosities. (The crucial point about visual6502 being that we can see what the causes are because we have all the transistors: this might be helpful to emulator writers and to other people interested in cycle accurate behaviour. On the other hand, we are modelling a specific NMOS 6502, and we only simulate to switch level, so for example unassigned opcode 8B doesn't misbehave in the expected way - it misbehaves in its own way, but we know why.) Thanks to everyone for the various useful hints on this thread, and to Avery particularly for the Altirra documentation! Cheers Ed

the presentation is now up on youtube - 6 parts starting here - it's a very good talk!

That's what we expect, I think? What we can now do is understand exactly why: which states the Timing Control goes through, and why interrupts won't get a look in.

Oops - fixed that! (I'm acting as a co-maintainer, recently joined the team and not taking credit for the past year of work...) Agreed! The overall aim of the project is as an educational/investigative resource. Now we have all the activity on the busses and latches, we have the info we need to annotate such a diagram. In due course we hope to construct an accurate schematic, and then we can verify or fix the block diagram. With luck, we'll get lots of help from interested people - there will be a forum, and so on. Cheers Ed

I think it's fantastic! Having deprocessed and photographed the CPU, they captured the layout, computed the netlist, and can simulate phase-by-phase. Including undocumented behaviour and some surprises. The test was to view Atari game graphics - see the big pdf file! Being a chip person, I really like exploring the layout and seeing how it ticks. Here's a screenshot:

Thanks for the info, I want one of these too! (and also models for Pokey, Antic, Gtia, of course :-) so long, Hias That looks fantastic - a visual simulation of 6502 derived directly from photographing deprocessed chips. There's something like a bit like it for the 4004 by Lajos Kintli (Windows executable). See this screenshot: