tcdev

Now they're coming out of the woodwork! Odd that I haven't heard of these efforts before!?! I might press ahead with my implementation anyway (but I'd be interested to learn about you efforts too!) - it's a great way to learn about the Atari computers!

Nice - this is exactly what I'm after - thanks!!! Oh wow - is it finished? I haven't had a chance to look at it yet... Yeah, mine will be all synchronous, rising-edge logic. I'm running a master clock of 16x colour clock, so if I need to interleave access, I can derive from this. Thanks again!

All I've found so far are the ANTIC, GTIA datasheets, the Altirra Hardware Reference Manual (which is very good) and various FAQ's and some schematics here & there. I'll keep looking for the above-mentioned docs - thanks!

Can anyone tell me about the HYSNC (CSYNC) timing in the GTIA? The ANTIC feeds VSYNC but only HBLANK, so it (GTIA) must generate HSYNC somwhere in the blanking period, but I'd like to know the exact timing if possible!?! Starting to think the GTIA isn't as complicated as I first thought... TIA Regards,

It would just be until I can see something ("READY"?) on the screen... but now I'm thinking I'll just do it properly straight-up!

Actually, I'm tempted to cheat a little here... I'm using a sizable FPGA and the entire 64KB RAM is implemented on-chip (with plenty of room to spare) so I'm thinking about simply using dual-port memory (for now) so the ANTIC can DMA happily without disturbing the CPU... although I'm aware that could cause some issues. It's just that the T65 core I'm using is a straight 6502 (no HALT# pin), though looking at the Atari schematics for the A800 they appear to simply disable Ø2 to the CPU if I'm not mistaken... Just a quick 'n' dirty to make my job easier just to display something... or maybe I'll do it properly... hmmm...

Thanks all that have replied to this topic! I've hooked up my clocks, implemented VCOUNT in the ANTIC, and implemented the VBLANK interrupt. Now the kernel is hitting the ANTIC DMACTL & DLIST registers - exciting stuff! Now the hard part...

Thanks! Ah, so the ANTIC doesn't actually require the colour clock then? Because it's fetching memory and nothing more, the fastest clock it requires is the CPU clock - right?

Hi all, I'm very new to the Atari scene and I'm currently playing around with emulating the Atari 800XL in an FPGA. I know, I know, you've heard it all before, blah blah. Well, it'll never get done if no-one makes an attempt - right? Let me get my question out of the way first - I can't for the life of me find any reference to the frequency of FØ0 generated by the GTIA and fed into the ANTIC!?! Can anyone tell me what it is? Back to FPGA's - I've seen a few different people announce similar projects over the years, but I don't know of anyone that has finished the job!?! Has anyone finished? Anyway, I have the kernel ROM executing right up to the point where it loops polling the ANTIC VCOUNT register. So now it's time to start implementing the video chips. I've got my NTSC colour clock frequency, and my CPU frequency derived from that; but not sure how the ANTIC derives its 3.5MHz & 7MHz signals. I presume FØ0 is one or the other - yes? The Atari sure is an interesting beast! I've done complete implementations of the TRS-80 (Models 1, 3 & Coco 1/2), a reasonably functional BBC Micro & Super80, and a very rudimentary Apple II. Not to mention dozens of arcade games. My project page is here. But the ANTIC & GTIA are like nothing I've come across before! I'm looking forward to the challenge! So any help with FØ0 would be greatly appreciated! Regards,

I've been working towards this, from a HDL perspective, for some time. Still in the experimental phase... but the idea was to build a MAME-like development framework for FPGA emulation by developing standard modules such as bitmap, tilemap and sprite engines, PS/2 input modules, plus other I/O that could be wrapped around platform-specific emulation cores. Managed to shoe-horn a few designs into it, but it's a lot more difficult than an equivalent software project. Anyway... <PACEDEV>