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Stuart last won the day on September 18 2016

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  1. That space to the right of the resistor pack labelled "S1 (Opt)" may be the space for an optional switch pack. Is that component across it just a zero ohm resistor that selects DSK2 as the default when the switch pack is not installed? If you get the pinout for the floppy connector (it's standard) and have a multimeter, you could check if that resistor is connected to one of the drive select connector pins, which will give you a clue as to how to tweak the connection to change it to DSK0.
  2. Two stack-related instruction: -- BLSK - branch immediate and push link to stack. Uses a workspace register as a stack pointer, and the stack grows down in memory. -- BIND - "The BIND instruction serves as the inverse of a BLSK instruction if the register indirect autoincrement addressing mode is used. Indexed addressing used with BIND implements a powerful CASE or multi-way branch instruction where the immediate operand points to a table of branch addresses and the register contents selects which way to branch."
  3. Look carefully - they're 4416 - each 16K x 4 bits.
  4. Well for the TM990 ... You can configure the CPU board to generate either \RESET or \LOAD at power up, and select between memory maps that place the EPROM either at the bottom or top of memory (and RAM goes at the 'other' end). So you can configure it with EPROM high so you can set/modify the RESET, interrupt and XOP vectors (should you want to) as these would be in RAM, or configure it with EPROM low so you can set/modify the LOAD vector as this would be in RAM. The RSET instruction is decoded to generate the \IORST signal. The LREX instruction is decoded to do single stepping using the LOAD vector. [The same technique of single stepping using 3 cascaded flip-flops works with the 9995; the instruction prefetch doesn't appear to cause a problem.]
  5. If you're after the datasheet because you're having problems programming them, did you see https://forums.arcade-museum.com/threads/issues-programming-tms2532a-45jl-eproms.455368/? (TLDR; there are a load of fakes that are actually 2732's)
  6. "the internal memory mod" or "an internal memory mod" - did you have a particular one in mind as there are several (assuming you're referring to 32K in the console)? The one I put together (http://www.stuartconner.me.uk/ti/ti.htm#32k_memory_expansion) has a switch to disable it. It's probably possible with any of the 32K mods, although you might need to tweak the mod circuit slightly to fit it.
  7. Testing the CPU card in isolation might help, see if CLKOUT still has the glitches. Would be interesting to see if a 3 MHz oscillator works. This would assume that the CRU interface is synchronised just to the CRUCLK signal, not needing a synchronised clock phase as well. The TM990 backplane has some resistor terminations on some of the signals, so even at 3 MHz it looks like the nature of some signals means they need termination. More signals have terminations on the 8-slot backplane than on the 4-slot backplane. See table 1 (page 4) and pages 8 and 9 of http://www.stuartconner.me.uk/tm990/scanned_docs/TM990_510_520_Card_Cages.pdf.
  8. Are you able to isolate CLKOUT near the CPU to see if it's picking up interference from the backplane? Does adding terminating resistors to the CLKOUT at the 'end' of the backplane make any difference? 220Ω to +5V and 330Ω to GND. Are you using a TMS9902NL or TMS9902ANL? Might be best to use the latter version just in case the change to the "A" revision helped address your problem ...
  9. A few observations comparing your code to the code in TIBUG. May make no difference whatsoever but maybe worth a try! -- Instead of [ldcr @intvl,8], try [SBZ 13] to disable loading of the interval register. -- In strout, after transmitting the character, test bit 22 again and loop until it indicates that the transmit buffer register is empty, then test bit 23 and loop until it indicates that the transmit shift register is empty, and *then* loop round to look at the next character in the text string. -- In strout, you test for the CTS pin to become active. I get the impression from the data manual that this is handled in the 9902 hardware - transmission won't begin until CTS becomes active. Is your 9902 an original TI one, rather than from China? Do you see the same errors if you increase the Baud rate?
  10. Yes, Cortex BASIC. From the manual: "If a number can be represented in a 16-bit twos complement form, it is stored in integer format." Which is only partially true, as some mathematical operators convert the value to floating point even though the result is an integer. So: A=2 <--- stored as integer A=A*2 <--- result stored as integer B=2 <--- stored as integer B=B^2 <--- result stored as floating point
  11. Nope, all done in Cortex BASIC.
  12. That is *way* slower than I was expecting. A 9900 running with no wait states can do it in a little over 5 minutes.
  13. I designed the board as per the original, but I use an ATX PSU extension cable modified with ring terminal connectors fitted to the +/-12V and +5V wires and bolt these to the terminal areas on the backplane.
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