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Posts posted by Stuart
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In order to get things just right, I need to space the stackable header on the TIPI a bit... I could harvest insulator off of these:
but I thought that would be wasteful, if I could get the insulator without the metal part somewhere... I'm just having trouble searching... anyone feel like googling that for me?
Or have a better idea of what they are called than 'header insulator' ?
If you just need a spacer, then presumably you would only need to fit it to a couple of pins (the pin at each end plus perhaps one in the middle)? So re-using bits from a pin strip would be quite economical?
Or could you cut a slice off a nylon hex spacer and secure in place with a dab of glue?
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Confirm that you're definitely typing the command as all caps? OLD "DSK1.FILE", not old "dsk1.file"?
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Pins 10 and 11 did go active when selected.
I finally got a bit of time to work on the TI, and started messing with the card. I replaced the 74LS259 with a socket, and hardwired Pin 9 to +5V. I also lifted Pin 32 of the FD1771, and hardwired Pin 32 of the socket to +5V. This caused the Drive Select 1 to always be active. When powering up the PEB, the light comes on, and when powering up the console the head in the drive knocks several times. However, when attempting to access the drive in either Disk Manager or TI Basic, it still returns error 00.
With the new 74LS259, does Disk Select 1 (pin 9) work properly when you try to access the drive (with no hardwiring)? If yes, does that signal also make it through to the floppy connector?
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Would be easier just to bend the tabs away from the board, rather than having to take the console apart to remove them?
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I believe the sidecar-floppy has the same CRU address as the nanoPEB virtual disk controller. If so, the sidecar will be seen first, so the nanoPEB controller will never execute.
If the CRU addresses are the same, then won't both be 'seen' at the same time, and it will end in a very messy crash? Unless one unit manages to drive the data bus far better than the other?
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Well, I did some probing on the controller card, and I found this:
- Disk Select 1 comes from an 8-Bit Addressable Latch (74LS259, U23)
- The Clear, Enable, Data, and Address lines to the 74LS259 seem to work, but Disk Select 1 (Pin 9) never goes up
Does this mean it's likely U23 that's bad, or is there probably something else going on?
Do the Disk Select 2 and 3 lines (pins 10 and 11) go active if you try to select those drives?
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Would be useful to capture IAQ as well.
Could it be something like:
-- The first write in the capture is the end of the previous instruction - ignore it.
-- Starting at 6us its reading an *instruction* from >6xxx, first the odd byte then at 7us the even byte.
-- The instruction is something like INC Rx, where the workspace pointer is set to >8xxx. At 8.5us it reads the value of Rx. (The LS address bit is high but as this is 16-bit memory that doesn't matter?) At 10us (0us) it writes the new value of Rx back.
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If no one comes up with something concrete, could you do the bus capture again but also include the Phase 3 clock (also on the side port)? And which addresses is it accessing in those two memory cycles?
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If you've got a piece of IDE cable kicking around, you can replace the original cable with that - just use every other conductor and the spacing is then about right, and cut the unused ones short.
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If you want to do it manually, then look at section 24.9 of the E/A manual, which lists op-codes and instructions. Then looking at your code, for many instructions you can identify the op-code just by looking at the first 1, 2 or 3 hex digits, without having to get into instruction formats or fields. For example, if the op-code starts with a C then it's a MOV instruction. A 1D is SBO. 09 is SRL. 020 is LI. And so on.
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Thanks, Schmitzi. I will look for it when my unit returns but it wont say F18A...yet.
Anyone know if it's the NanoPEB saying "F18A" - is that the version of the NanoPEB that includes a boot delay to enable the F18A to initialise properly?
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Interesting, it looks like they are passing constant parameters to WRTVCL as DATA immediately following the BL instruction. I've started doing this in a few places in my own code, but I hadn't seen it discussed in the assembly programming thread. For each parameter, using DATA is one word shorter than using LI and passing in registers. The called function can easily get each parameter using MOV *R11+, <reg>, and that also moves the return address in R11 to the correct location after the DATA statements.
It's fairly common - TI use the technique is some of their own example programs. You can do the same with a BLWP instruction by using MOV *R14+,Rx.
Also useful for supplying jump addresses for a subroutine. For example, suppose you had a routine to input some hex characters from the user. You BL (or BLWP) to the routine, and follow that with a DATA statement containing a jump address if the user makes a null input, then another DATA statement containing a jump address if the user inputs a non-hex character, then the code returns to the next word if the user input is valid and the program continues.
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You bought it from Jaime Malilong who makes them and sells them on eBay? Give him a shout through eBay - I understand he's very approachable regarding repairs.
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Has anybody investigated non-blocking multitasking in the TMS9900?
There's a multi-tasking OS for the 9900 called PDOS that may be of interest. See https://vaxbarn.com/index.php/other-bits/105-pdos.
"PDOS is a powerful multi-user, multi-tasking operating system developed by Eyring Research Institute, Inc., for the Texas Instruments compatible processor family. You use PDOS to design and develop scientific, educational, industrial, and business applications.
PDOS consists ot a small, real-time, multi-tasking kernel layered by file management, floating point, and user monitor modules. The 2K byte kernel provides synchronization and control of events occurring in a real-time environment using semaphores, events, messages, mailboxes, and suspension primitives. All user console I/0 as well as other useful conversion and housekeeping routines are included in the PDOS kernel."
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Black and Brushed Al-You-Min-E-Um! Brilliant really!
Don't you pronounce it Al-Ooo-Min-Um in the US?
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Interesting, I had never heard about the interrupt mask being decreased by 1.
Does this mean that, if I use LIMI 2 as convention always dictated, can my interrupt handler be interrupted by yet another interrupt? Since 2 decreases to 1, and all interrupts are hardwired as 1 in the TI? Should we be using LIMI 1 to ensure interrupts can't interrupt interrupts?
Looking at the manual, the "decreased by 1" isn't quite correct. It is set to 1 less than the interrupt level being serviced. So if you have done a LIMI 2 and the level 1 interrupt occurs, the interrupt mask will be set to 0 for the duration of the interrupt service routine.
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Just adding that the interrupt signal lines from the sources come into the TMS9901, where the interrupts can also be masked and disabled. So for an interrupt signal from a source to actually causes an interrupt on the 9900, interrupts need to be enabled on the 9901, the interrupt mask on the 9901 must be set to enable that interrupt, and the LIMI level on the 9900 must be set enable that interrupt level.
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I need to go through troubleshooting this spare board that I have again, before I start unsoldering everything. The -RESET line is set high all the time... which makes me suspect the TMS9900.
Have you tried replacing the TIM9904 clock chip which generates /RESET? (May be a 74LS362 on very early boards.) It is sometimes already socketed which makes life easy.
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Hmmm ... will have to think about that for a while.
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The +12V regulator in the power supply is rated for 1.5A, and the console is using around 330mA. Even if the transformer and PCB traces could handle it, the power supply is going to get pretty darn hot if you try to pull another [email protected]+12V out of it. Not so much a coffee warmer, more a fusion reactor ..

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Can anyone judge whether I should be able to use this for amplifying the volume of a microphone before it enters a video capture device?
Thanks.
I'm not an expert, but if you're wanting to amplify the signal direct from a microphone then I think you need a mic pre-amp (which will amplify the very low signal level from a mic). Search for the Velleman K1803 kit and see what you think.
Stuart.
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I think Atari used the TI speech chips in many games.
Reading the "Memo and Status Reports" linked to from [http://www.jmargolin.com/vmail/vmail.htm] is interesting. Covers Atari's selection and introduction of the TI speech synth solution.
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Anyone suggested cleaning the side port contacts yet? Something like cotton swabs and isopropyl alcohol, or maybe a small abrasive rubber if there is room.
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I've got some more PCBs for building your own TMS 99105 or 99110 system if anyone is interested (also more PCBs for the TMS 9900 system - see http://atariage.com/forums/topic/267619-tms-9900-project-pcb-available).
Cost is £26 + postage to you from the UK. This will get you:
-- a PCB
-- D-type 9-pin socket
-- DC power socket
-- 2 off W24257AK-20 RAMs
-- 2 off 74ALS645AN transceivers
For the other components you need, see the link in the first post on this thread.
Send me a PM if interested.

In need of CorComp FDC pics...
in TI-99/4A Computers
Posted · Edited by Stuart
One useful test for any faulty card is to check if the DSR on the EPROMs can be read. This is easy if you have a MiniMem cartridge (see http://atariage.com/forums/topic/227990-ti-99-disk-controller-question/?p=3039394) but more difficult if you only have an Extended BASIC cartridge. I've pasted below a short XB program that will read and display the start of the FDC DSR. I've kept it as simple as possible because without a working FDC you're likely to need to type it in by hand! (** NOTE: I've tested this with Classic99 and it works OK, but haven't tested it on real hardware! **)
10 CALL INIT 20 CALL LOAD(12288,2,12,17,0,29,0,2,1,64,0,2,2,48,32,204,177,2,129,64,128,22,252,4,91) 30 CALL LOAD(8196,63,248) 40 CALL LOAD(16376,70,68,67,32,32,32,48,0) 50 CALL LINK("FDC") 60 DIM B( 70 FOR A=12320 TO 12392 STEP 8 80 CALL PEEK(A,B(1),B(2),B(3),B(4),B(5),B(6),B(7),B() 90 FOR L=1 TO 8 100 PRINT STR$(B(L))&" "; 110 NEXT L 120 PRINT 130 FOR L=1 TO 8 140 IF B(L)<32 THEN PRINT "."; ELSE PRINT CHR$(B(L)); 150 NEXT L 160 PRINT 170 NEXT AWhen you run it, you should get a screen similar to the following, showing lines of 8 bytes of data in decimal then those same bytes as ASCII on the line below. For any FDC, the first four numbers should be 170 (>AA), then a low number or zero, then two zeroes. The data after that varies by type of FDC (the screen below shows the DSR used by Classic99). For a standard TI FDC, you can see the data here: http://www.unige.ch/medecine/nouspikel//ti99/dc1.txt. You can easily look for the device names supported by the DSR ("DSK") in the ASCII part of the listing (to do this for the TI FDC, you'll probably have to change the second number in line 70 from 12392 to 12448 as the device names are further into the DSR, but you'll lose the first couple of lines of results as they'll scroll off the top of the screen).
If the DSR data looks correct and you can see the device names, then the FDC problem most likely lies with the floppy drives, the cable, or the floppy controller or associated circuitry on the card. If the DSR data looks corrupt (and you're absolutely sure you typed the program in correctly!) then you have a more basic problem with the console unable to read the EPROMs or the EPROMs are corrupt, and no messing with the floppy drives or cable is going to help.
[Jt - I replied to your e-mail but haven't heard anything back from you.]