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mizapf last won the day on August 31 2016

mizapf had the most liked content!

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About mizapf

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    River Patroller
  • Birthday 09/24/1969

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    MAME, TIImageTool, Ninerpedia
    Linux advocate (openSUSE/KDE)

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  1. Oh, that's great! Thanks! I really should have checked the link before posting.
  2. By the way, the Corcomp PALs are 12L6, not registered. Their equations should be derivable from going through all input values and watching the outputs. Maybe some readers support this brute-forcing?
  3. I just started to implement it. Maybe I can guess the behavior of the PALs. The good news is that the new MAME-implemented Corcomp controller already crashes when I try to load from it. (This is good, as it means that the card survives the power-up, and it is invoked for DSK1. I'd say this is OK for a couple of hours time.)
  4. Do we have the PAL equations of both variants? I have a file "CC_FDC-REV-A PALS.pdf", but it only describes how the PALs are externally connected; it does not reveal the equations. All PALs are PAL12L6.
  5. Sometimes, it is worth having a second look at the pictures ... Translation: - small label: "Button out 1400" - white label: "Upper button pressed 1100, not pr. 1400" / "Lower button pressed lower block, not pr. upper bl." This looks like a non-standard mod. I guess this need not be included in the emulation.
  6. As you may have guessed, I'm about to add the Corcomp controllers to MAME. I plan to implement both 2793 and 1773 versions, but I am still not sure about the meaning of the switches. The "xray image" below shows that the lower switch goes to pin 26 of the EPROM sockets, which is the MSB of the address. That is, you can switch from the lower half of both EPROMs to the upper half of both; that is, you can replace both ROM banks by a second version with this switch. The upper switch has to do with pins 7 and 9 of the PAL U12, which mean A5 and A7. Two more wires are connected to traces for A8 and A10 (right from the right EPROM socket). The picture does not reveal how the wires are connected to the switches. ... What short name do you prefer for the cards? We already have "hfdc", "tifdc", and "bwg". My suggestion is "ccfdc" for the original controller, and "ccmgfdc" for the revised version. Or better "ccfdcr"?
  7. Looks good. By the way, my explanation was correct (wait until the bit is cleared), but this is a typical misunderstanding of TB. It sets the EQ bit to the value that it read. Hence, the comment should read "loop while the bit is 1".
  8. Not my own card, but the top card does have "Corcomp" on its PCB. Look above the dip switch array. It corresponds to the schematic below that Ksarul posted some weeks ago.
  9. The interrupts of the 9900 are level-triggered, which means that as long as the input line is asserted, the interrupt will occur as soon as the interrupt mask allows it. Suppose the VDP asserts the VDPINT* line; this line goes to the 9901. If bit 2 has been set before, lowering to 0 means that the 9901 will trigger an interrupt. This interrupt goes via the EXTINT* line to the 9900, and the level is set to 1 by the ICx lines. This EXTINT* line is continuously pulled down until you clear the interrupt in the VDP. If you have LIMI 0, the interrupt is not sensed by the CPU. As soon as you set the mask to 2, this is higher than the actual interrupt level, and this will trigger the interrupt microprogram as soon as the current microprogram (current instruction) has completed. The interrupt is triggered by the asserted EXTINT* line. If you do a LIMI 2 without this line being asserted (0), no interrupt will occur. You could do the following: - Do a LIMI 0 - Poll bit 2 - As soon as it cleared, do a LIMI 2.
  10. By "MG card" I referred to the redesigned card with MG ROMs. See below
  11. I noticed that schematics show two sockets for 2764 EPROMs (8Kx8), but the cards I saw have one 27128 EPROM (16Kx8). It seems to me that the jumpers next to the left socket are used to switch between 8K and 16K EPROMs, right? The MG cards do not have these jumpers. But they have a switch at the edge that seems to select the first or the second half of each EPROM. Does anyone have any information about this and the other switch?
  12. May I also add that Uranus is correctly pronounced like "You-rennes". (It took me 40 years to get the pun.)
  13. If you set bit 2, you enable the interrupt sense of the 9901. Setting the bit does not trigger an interrupt. The VDP interrupt output is routed to the interrupt 2 input of the 9901. If bit 2 is set to 0, no interrupt will be triggered. However, you can still read the value via TB (as it is the level of the VDPINT line). If you set it to 1, the 9901 will trigger an interrupt at the CPU (hardcoded level 1) when the VDPINT line becomes active. You can disable the VDPINT line using video register 1. When disabled, no VDP interrupts will ever occur, independent of LIMI and bit 2.
  14. It is indeed interesting to see that many people assume that "www." could be omitted. "www.domain.com" and "domain.com" are two different DNS names, and they may be assigned different "A records", which means different IP addresses. On the other hand, if you have a DNS name like "comp.domain.com", some people assume this must be prefixed by "www.", similarly wrong. It is just a convention that www.domain.com and domain.com are assigned the same addresses. The ugly point here is that many browsers treat those addresses as equivalent, which is a really BAD thing. Even worse, as I heard, Chrome starts to remove the www subdomain from the presented URL. I am concerned about similar developments that seem to be motivated by some weird concept of comfort, which are in fact violation of specifications. (this is not against you in particular )
  15. This is what I also had in mind some time ago, when I proposed a new boot EPROM. Auto-detection is a kind of luxury that one must be able to afford. My idea of "drivers" for cards would be a unified way of loading specific drivers, and making use of the user's intelligence to provide the correct one. You can identify speech by trying to load vocabulary bytes. See Editor/Assembler manual, "Chcking to see if the speech synthesizer is attached" (22.1.6).
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