Kroko

Ok, now I understand One more question: Which circuitry is going to hold the databus content after you pull down the NWE line ? Are the CPLD inputs going to do that ? And does that mean that a board wanting to support this method would need to connect all 8 data lines to the CPLD ? Can this behaviour of the CPLD be seen somewhere in the Xilinx datasheets ? I fear some µA leakage current could already corrupt the bus content, or ? I would like to get a feeling about this ability to "hold" the bus content.

I think that magic write idea is quite interesting. If it works reliably, then this could really be something very interesting for future board designs. But I don't understand one thing there. Can you explain please, why a difference of 8 ns for the whole cycle or 4 ns of one half cycle makes it necessary to have different designs for PAL and NTSC ? The 8 ns seem to be not very important, or ? And of course the timers on the VCS board are not so very accurate as well. Do you think they are better than 0.1% ? Or maybe I didn't get the point ?

notBD = not Boulder Dash

This is the 3E (64K ROM and 32K RAM) prototype I made in case Andrew gets the license to release notBD on cartridge. I wanted to do all I can to make notBD on cartridge possible. On the other hand, I have currently no plans to mass produce this special board unless Andrew needs it for not BD, also because I will be busy with the next Krokodile run for the next few month ... The 64K board design that Albert has available is not supporting RAM. It is just the next logical step that comes after F4 to support 64K instead of 32K.

For 64K Atari style bankswitching, the hotspots have already been defined. They are $1FE0 - $1FEF. Thats why Paul (or somebody else ?) called it EF Bankswitching. I think Alberts prototypes use the same hotspots, or ?

For detailed questions you should contact Adam Wozniak. He is currently working on a 2600 on a FPGA and I guess he knows every little detail. There is also a mailing list, but its quite silent there... I think Adam has TIA VHDL code available that might answer some of your questions if you take a look at it. http://cuddlepuddle.org/mailman/listinfo/fpga2600

Should be somewhere on Alberts computer You need to contact Albert and tell him you want to be on the list.

It is not only F8 switched, but it also uses extra RAM. That makes things even more complicated

I will start to make devices and send them to Albert. He will offer these devices to the people on the waiting list - first come first serve. I am planning to make enough devices that we can offer them in the store this time. But that depends on how many people want to buy it. The device will not be in the store as long as people on the list don't have their devices. After that, it will be in the store, but I can't tell you when this will be. There will not be any pre-ordering this time.

Check this: http://www94.pair.com/jsoper/bankswitch_f8.html http://www94.pair.com/jsoper/bankswitch_f6.html

I have ordered new PCBs and I think that I can start building new devices mid of January

You have to connect A12 on the cartridge edge connector to the INPUT of your inverter and connect the inverters OUTPUT to /OE of your chip. If you mix this, you will most likely create a permanent bus conflict and I don't know how long a can 2600 survive that.

Well, you don't need to describe your board if you don't want to. But in that case I can't judge whats best for your needs. Price is not everything in my opinion. There are lots of board parameters that are important to decide which manufacturer fits to your needs best.

I don't know any PCB manufacturer who copies existing boards. You have to provide them with some PCB Design Software format. If you only order a few pieces, they will be much more expensive than what you can buy here at AA. They start to get cheap if you order high quantities. But before you can do that, you need to check your design with at least one Prototype. And Prototypes are in general very expensive compared to the AA Boards. But of course it is difficult to say anything unless you tell us what you actually want to do Armin

ugh .... i was just confused ....

I guess so

Top D3 D4 D5 D6 D7 A11 A10 A12 A9 A8 +5V SGND --1- --2- --3- --4- --5- --6- --7- --8- --9- -10- -11- -12- GND D2 D1 D0 A0 A1 A2 A3 A4 A5 A6 A7 Bottom Unfortunately there is a little but important error in the diagramm above. The Pinout actually is like this: Top D3 D4 D5 D6 D7 A12 A10 A11 A9 A8 +5V SGND --1- --2- --3- --4- --5- --6- --7- --8- --9- -10- -11- -12- GND D2 D1 D0 A0 A1 A2 A3 A4 A5 A6 A7 Bottom Which means A11 and A12 are interchanged in the original version. I don't know if this is what went wrong, but I guess it could be Armin

Maybe a stupid question, but which EPROM type are you using now ? What is programmed on this EPROM ? Did you verify that the EPROM really contains what it should ? And finally, which Atari cart did you use for your experiments ? Can you post a picture of what you have finally done ?

Very cool. I'm looking forward to getting mine. 973107[/snapback] You are on top of the list of course

Well, finally some good news. I can most likely start to build new carts mid of december. Or at least I can order the parts and the PCBs there. So I would think that they could be available end of january or february. I can't promise anything, but it doesn't look so bad. As soon as I know it for sure I will post it in the Krokodile Cartridge thread. However, it will be a Krokodile-Free Christmas

While reading this, I thought about the two solutions for inverters: Chip Inverter (e.g. 74HCT04): costs about 10ct and you need to solder 16 pins but you only have to handle one part. (only 7 pins have to be connected, so in theory you would only have to solder 7 pins) Transistor solution (e.g. 2N3904): costs about 5 ct together with the 2 resistors, but you have to handle 3 parts and you also have to solder 7 pins. The space needed on a pcb is (almost) the same. Does anybody have an idea which solution is more reliable or creates less noise ? Armin

Does it really have to be TCP/IP ? Or would the printer port be ok, too ? It sounds like overkill to control just a few TTL lines with a protocol like TCP/IP ?!

If you want the stack pointer to point to VCS memory location $80, then you have to write $80 to SP. Don't get confused. It is just an ordinary pointer. It points to the adress thats is in it. Nothing special here. It is not an offset and you access the adress that it points to. So you will access the TIA if the MSB is 0 and RAM if the MSB is 1

I am using the attached Congo Bongo dump. Works fine on my Krokodile. Armin CONGOBONGO.BIN