FarmerPotato
-
Content Count
1,464 -
Joined
-
Last visited
Posts posted by FarmerPotato
-
-
1 hour ago, TheBF said:I would need to do some real study to make a RORG image I suspect.
So never mind output tagged object format (RORG or otherwise).
If you are going straight to a binary file, there are some bytes you put at the beginning for MDOS. GenLINK would do that for you (and it knows a lot of kinds of headers it can generate, including none at all) You are familiar with the 6 byte header on the 4A that tells EA5 where to load the PROGRAM file. This is something like that.
I looked for documentation but I can't find any...
So I opened an example in a hex editor. I see
0046 00 and the letter F 14B6 0400 this looks like a load address 1001 JMP $+4 5ac7 SZCB @02E0(R11),R7 certainly not code . let's go with DATA >5AC7 02e0 LWPI >F000 f000 0200 ...I think the byte 0 at the beginning means there are no more files after this one?
BYTE 0 no more files after this
BYTE 'F' 'F' is for fast pages , 'G' would be for slow pages
DATA >14B6 length of this file. Max is >4000, beyond that you have to continue in next file
DATA >0400 load address
Help?
-
Here is a sample GenProg build process:
Source file SRCS
Batch File DOIT
ASM SRCS,OBJ,RS232,RLC LINK !LINKControl File !LINK
ADD OBJ LIBREF LIB_MD STATUS SAVEALL PGM EXITCommand line:
A:>DOIT
... GENASM loads SRCS, outputs OBJ ...
... GENLINK loads OBJ, outputs PGM ...
A:>PGM
... PGM is loaded starting at address >0400, runs starting at >0400
Here is the file SRCS
SpoilerREF PRINT subroutine from LIB_MD DEF START unnecessary LWPI >F000 B @START * first argument to the system call XOP KBOARD DATA 5 VIDEO DATA 6 MEMORY DATA 7 DSR DATA 8 UTILTY DATA 9 MATH DATA 10 .. equates and stuff .... START * Get and Map Memory the full 8 pages of RAM * fill up the 64K memory space * allocate our virtual pages 1-7 if they are not already LI R0,1 allocate memory LI R1,7 LI R2,1 SETO R3 use fast memory if available XOP @MEMORY,0 MOV R0,R0 JNE ERROR * map virtual pages 1-7 to logical pages 1-7 LI R1,7 IN0 LI R0,3 map memory MOV R1,R2 XOP @MEMORY,0 MOV R0,R0 JNE ERROR DEC R1 JNE IN0 * now do stuff BLWP @PRINT subroutine from LIB_MD TEXT 'Hello World!' BYTE 0 * maybe initialize a heap starting at SLAST * maybe initialize a stack extending down from >EFFE SLAST EQU $ END -
1 hour ago, TheBF said:I understand most of that. (What does RORG do? Relative Origin?)
5 minutes ago, TheBF said:How does that work? I have never built anything like that.
The Assembler image has to flag that somehow I guess.
Does the loader correct any addresses in the image or is everything relative to some reference value in the image?
Although my Forth compiler's code is relocatable using PC relative branches, the location of the two stacks have to be initialized to something and there are system variables that point to various addresses in the system for parsing text and managing the linked list of labels.
I would need to do some real study to make a RORG image I suspect.
RORG is the default setting in the TI assembler.
The assembler produces tagged object code files, with directives for relocatable address (starting at 0), absolute address, etc. These are "EA3", DIS/FIX80 format files.
The linking loader "corrects" or rebases relocatable symbolic addreses.
If you are producing a binary file, in a PROGRAM type, this is also known as EA5, it is not relocatable. The 6-byte header at the start tells the EA5 loader where to put it, how long it is, and if there are more files.
I'm sure you guessed that tagged object format is much bigger than PROGRAM binaries. It uses 5 hex digits to represent 2 bytes. A tag and 2 bytes. It also has checksum tags and symbol REF and DEF tags. A 'compressed' variant uses binary instead of ascii, so a tag is followed by 2 bytes 0-255.
The linking loader knows the first free address in memory, and puts any relocatable segments starting there. It adds the starting address to local symbolic addresses in the object file, which are assembled as offsets from the program's start.
On the 4A, loading begins at the high memory at >A000. If that fills up, it goes to low memory at >2000-ish.
If your object file is relocatable, and the loader begins by putting it at >A000, the result is just as if you specified AORG >A000. Except, the first free address isn't updated.
GENLINK is a lot more versatile. You tell it which address ranges can hold relocatable code. But it outputs a memory image (or set of images) that are binary dumps of that memory. It takes place virtually, so you can link into any address range, or produce more than one output that will be overlaid.
The 4A linking loader only loads, it doesn't save PROGRAM images. To save images, you need to use TI's SAVE utility, or my SuperSave which does all the work for you.
-
On 10/28/2020 at 4:25 PM, BeeryMiller said:There was also McCann Software Forth for the Geneve. Several commercial applications were written by Mike for the Geneve including The Printer's Apprentice (TPA), and The Geometer's Apprentice (TGA). There may have been some fonts that went along TPA.
BeeryWhat has been done to preserve commercial applications? I realize some folks will treat things as abandonware, while others will not copy them. Another route is to track down the authors again.
But I would really like to see these McCann products--I had only seen the illustrated full-page ads in MICROpendium.
-
On 10/28/2020 at 8:00 PM, TheBF said:Cool so one could do
A:>EXEC DSK2.CAMEL99
Is there a technical document on how to write programs for MDOS ?
My cross-compiler has a 64K segment reserved for the target program. I could make a very FAT Forth system for Geneve. (not that many would care)
I would care about Camel99!
I was just finding the GenProg documentation here: http://ftp.whtech.com/Geneve/mdos/MDOS Development documents/
For instance, this MDOS reference (it is kind of dated) and the collection of API calls documents. Manuals for GENASM and so on.
From memory... I can convey to you that it's a breeze to build a MDOS native program with GenProg. Especially if your code is self-contained (no assumptions about E/A or console ROM).
The source should just use RORG. Assume you have 59K. Your address space is >0400 to >F000. You can put workspace in F000-F07E. F1xx-FFF9 is available.
You write a makefile and invoke it with MAKE.
In the makefile, you call ASM to produce object file(s). Then you call LINK to produce an executable.
GENLINK has its own control file, listing the input, output, and special directives. It can do quite a lot, besides making one big executable. (for instance, overlays.)
The specific things you'll have to replace with API calls are:
- Keyboard scan
- DSR access.
- VDP access you can leave as-is, provided you use Geneve specific equates for VDPWA etc.
- Console XMLLNK (and GPLLNK) will have to be replaced. MDOS has its own floating point API.
- Allocating and mapping memory pages to fill the space above your program
If your Camel99 build system outputs object or binary on its own, you could make that work, too.
-
1
-
On 11/9/2020 at 11:44 AM, grayin99 said:Here is a silver/grey version I printed using Hatchbox PLA silver filament. The front is some black spray paint (I didn't have any silver paint). Again this is @jedimatt42's design, I just added the TI logo to the file and printed it.
This was printed at .2 layer height so it is a little rough if you zoom in, but looks better in person.
Unfortunately my 32k card now appears to be toasted. A couple of the connector pins rolled while connecting it to the console. I fixed the pins but it fails memory testing now. I wond
Those came out really nice!
I recently fried my 32K sidecar by applying 9V. I replaced all 4 chips. They are very common ones. You can use 74HCT types (not 74HC) or 74LS types. Those and any 62256 Static RAM chip. One source for all that is Unicorn Electronics.
-
3
-
-
17 minutes ago, Shift838 said:i had to set my 910mp region to Germany. From my understanding you have to be in some European region to get the EXT (RGB) input to be enabled.
OK, its not just mine. I was afraid I had a goofy SCART cable and that was why EXT was always disabled. I read all the menu options several times...
If you supplied that in the instructions, I apologize for not reading them.
-
1
-
-
43 minutes ago, BeeryMiller said:I think there are two options to backup your HDS1. I'm assuming you have a Geneve here since HDS1 is mentioned though the two options mentioned below work for a Geneve or TI-99/4A.
1. Get a DREM and use it for your hard drives instead of physical drives. You use a SD card and can backup your hard drive image in < 1 minute.
2. Untested, by I think you can use HARDBACK by Tom Freeman, under Rompage/TI994A mode on the Geneve or using a TI-99/4A and backup from WDS1 to TIPI. Assuming HardBack recognized the TIPI, this is a file copy process so it will take longer. After MDOS 7.00 is released, I think you should be able to avoid Rompage mode.
If I have time and think of it tonight, I will confirm Hardback is a workable route.
Those are the simplest two methods, but each has a cost if you do not have either a TIPI or DREM.
Beery
Thank you, I did not know that DREM was the SD drive option!
I will say HDS1 to refer to the spinning metal MFM drive. I used to have a Myarc Winchester WDS1 (only on the 4A) What does WDS1 refer to these days?
When you say backup, you mean copy SD to SD, right? Can you backup a MFM drive to the DREM?
I would like to understand the format of the DREM image. Does it interchange with the MESS drive image?
My setup is now:
- Geneve 9640 with 32K added.
- HFDC with spinning MFM drive, external case power. Boots MDOS 6.00 but I see MDOS650 subdirectory I could try (must have floppy boot in place first)
- 3.5" B: drive and 5.25" 40-track A: drive. (Hooray!)
- @Shift838 SCARTgenie, to Samsung 910MP in French EXT mode. (Hey, anybody else get that to work without setting French region?)
-
1
-
2 hours ago, mizapf said:Preventing direct access to hardware is one of the reasons why the privileged mode was invented for processors. This could be done on the TMS99105 since it has such a mode. You cannot restrict the address access, but you could use a CRU bit to guard the clock hardware, and the TMS99105 allows access to CRU addresses 1C00 and higher only in privileged mode.
Yes, but it's still tricky to apply the tools to the problem at hand. Like you said, 99105 does not have "protected memory" features (The TM 990s with map feature with LMF instruction sort of do.)
I am going to place all of MDOS in user mode. (So the supervisor is invoked anytime MDOS does an XOP or there is an interrupt.)
But it's MDOS itself reading and writing the clock. For instance to implement the DATE command, the XOPs for get/set date time, etc.
To present a hardware abstraction layer, the memory mapper (in the FPGA) would have to act when it sees certain addresses in certain modes.
I could do that... I've thought it all through. Some ways are:
1. Implement page faulting for certain mode bits+addresses. Raise INT2 for page fault. Handle faults in software. Really gross--essentially you have to decode the offending instruction to implement it.
2. Put a big ball of FPGA glue on those addresses, which synthesizes the expected read/write behavior at F130-F14F ports. If I'm doing that, I might as well use any clock chip behind the glue.
3. I would prefer to use real chips, and just attach the MM58174 clock chip to the expected memory-mapped ports. These would be F130-F13F when MDOS mode is active.
The FPGA would barely get involved. It just outputs the page register value to the bus like any other memory cycle.
So my need is still to understand in detail what those clock memory-mapped ports are in MDOS mode. Why they seem to be read at F130-F13E but written at F130-F14E. And why I see MDOS write F13E as both the clock settings register CKSTRG and a data register.
-
On 11/8/2020 at 8:13 PM, BeeryMiller said:Either way, unless bugs are found, this looks there will be a nice update coming out. Fortunately, I make DREM backups of my hard drive images, so if something does go bad, it will not be catastrophic.
Beery
What is DREM backup? I'm wondering how I can backup my HDS1.
-
1
-
-
4 minutes ago, OLD CS1 said:Does MDOS/GeneveOS provide the interface to the hardware clock for software (asking as I know nothing about the Geneve OS?) I would expect an operating system to abstract access to any underlying hardware. For instance, the "CLOCK" DSR has a standard interface for software to query and set, and the DSR itself manages access to whatever chip is being used.
It would seem that if you wanted to use a superior or more readily available chip that changes could be made to GeneveOS to accommodate without sacrificing software compatibility provide the software is well-behaved and only uses the supplied interface. Why should user software access the clock directly?
From a user program, these are XOP calls you are expected to use. However, there is nothing to stop you using direct access to the clock registers at >F130 to >F14E or whatever they really are. The XOP don't cover access to features such as interrupts.
9. General Utility Decimal 0 Validate Time 1 Read Time 2 Set Time 3 Validate Date 4 Read Date 5 Set Date 6 Julian Date 7 Day of Week Example LI R0,7 XOP @NINE,0 MOV R1,@WEEKDA ... NINE DATA 9 WEEKDA DATA 0 day of the week 1=Sun 7=Sat-
1
-
-
29 minutes ago, dhe said:What is Geneve compatibility?
I mean, yes, you want to run MDOS, but, so what if you have you have to make a 200 byte addition to MDOS, to use a much better clock chip?
Lou Phillips, had to do that with the Geneve. Everyone wanted a TI compatibility layer + more (primarily a DOS like environment).
We are gifted in that MDOS source is freely available, primarily thanks to Beery.
I understand--but 100% binary compatible is a worthy goal, until it's out of reach. It might turn out to be out of reach...
The idea is that you could back up your Geneve 9640 disks, then boot them over on Geneve 2020.
Patching a binary is no picnic. Whenever Tim builds a new one, like the 7.0 beta just now, it breaks all that.
Compiling from source, it's a similar problem - if I need to make a source patch, I have to re-apply that whenever Tim edits the main branch.
(Of course, there will be no closed source here--anything I do will all be open source.)
If I have to patch MDOS, who knows how many applications also break? I think, with so little software for MDOS, I would hate to break something, because I won't have the ability to patch it. The exception is that I can easily patch any XOP without changing MDOS, because the processor will execute my code first.
On clock chips, the BQ4802 has pros and cons. If I were scuttling the idea of using a real vintage chip, I'd skip the 4802, and go with a much newer chip, and stick in on the FPGA SPI bus.
-
1
-
-
I'm looking at the MDOS source code and I see some funny stuff going on. First, the memory map should be:
F130-F13F Control registers of the MM58274C clock F130 Status. Bit flag >0800 Data changed F131 unused by MDOS? Tenths of seconds. READ ONLY F132 Unit seconds F133 Tens seconds F134 Unit minutes F135 Tens minutes F136 Unit hours F137 Tens hours F138 Units days F139 Tens days F13A Unit months F13B Ten month F13C Unit years F13D Tens years F13E unused by MDOS. Day of week F13F Clock settings registerGeneve2020 reference wiki: https://gitlab.com/FarmerPotato/geneve2020/-/wikis/X.-Appendix-Reference-Tables
MDOS source from which I derive those addresses:
File:HDS2.MDOS.HD.EQUATES Page: 7 Date: 10-30-04 Time: 01:41:46 * Real Time Clock on the Geneve (in native 9640 mode only) CNTREG EQU >F130 UNSEC EQU CNTREG+2 TENSEC EQU UNSEC+1 UNMIN EQU TENSEC+1 TENMIN EQU UNMIN+1 UNHR EQU TENMIN+1 TENHR EQU UNHR+1 UNDAY EQU TENHR+1 TENDAY EQU UNDAY+1 UNMON EQU TENDAY+1 TENMON EQU UNMON+1 UNYR EQU TENMON+1 TENYR EQU UNYR+1 CKSTRG EQU CNTREG+>F CLOCK SETTING REGISTERI see code in TMTOCM that reads these one byte at a time, tens first, then units.
File:HDS2.MDOS.HD.TIME Page: 4 Date: 10-30-04 Time: 01:41:46 TMTOCM LI R2,>FFFD flag for which time read TIM008 INC R2 JEQ TIM010 LI R1,COMBUF MOV R1,R8 LI R4,6 MOVB @CNTREG,R3 reset data change flip flop LI R3,UNSEC+1 TIM007 MOVB *R3,*R1+ tens,units,tens,units, etc. DEC R3 MOVB *R3,*R1+ AI R3,3 DEC R4 JNE TIM007 MOVB @CNTREG,R3 SLA R3,5 JOC TIM008 TIME HAS CHANGED * IT WAS READ, BUT IS IT POSSIBLE? DT0003 MOVB *R8+,R7 CHECK FOR CHARS LESS THAN OR = TO 9 ANDI R7,>0F00 CI R7,>0900 JH DT0002 CI R8,COMBUF+12 JNE DT0003 TIM010 RT R2 IS NOT 0This DEC, add 3, DEC pattern is used to read addresses in the order TENSEC, UNSEC, TENMIN, UNMIN etc
The memory map goes units, tens, units, tens, but we read tens, units, tens,units--up to 6 pairs, e.g. 20-11-09 17:36:00.
If the seconds ticks up during the read, the JOC TIM008 catches that and it tries again.
So far, so good.
When I compare how MDOS writes the clock registers, I am alarmed by seeing it use different addresses for reads or writes.
Here's the code:
File:HDS2.MDOS.HD.TIME Page: 7 Date: 10-30-04 Time: 01:41:46 SETIT MOVB @CBHFF,@CNTREG TEST, STOP CLK, INT SET, INT STOP CLR @CKSTRG NO INTERRUPTS MOVB @CBH05,@CNTREG NORMAL, STOP CLK, CLK SET, INT STOP MOVB @CBH01,@CKSTRG 24 hour mode, leap year LI R3,COMBUF LI R8,UNSEC+2 LI R10,6SETIT is going to write 12 bytes of time digits, from R3, COMBUF.
The loop begins with R8, UNSEC+2, that is F132+2 = F134. Since the first byte in COMBUF is tens seconds, I find it odd to see F134, when TENSEC is F133.
LOOPDT MOVB *R3+,*R8 assume cpu ram DECT R8 MOVB *R3+,*R8 CBH28 EQU $+1 AI R8,6 >0228, >0006 DEC R10 JNE LOOPDTSo the LOOPDT writes a byte to F134, then F132. Then it adds 6 to get F13A.
The result is R8 writes bytes at addresses F100 + 4,2,8,6,12,10,16,14,20,18,24,22
Starting at F134 it then progresses by -2,+6,-2,+6 ...
Except, the corresponding read addresses start at F133 and progress by -1,+3,-1,+3
I don't get why this is. Is it a bug in the Geneve gate array? Or intended?
read write F132 F132 F133 F134 F134 F136 F135 F138 F136 F13A F137 F13C F138 F13E addresses for Days units, but F13E is also CKSTRG F139 F140 F13A F142 F13B F144 F13C F146 F13D F148This means that regardless of whether your data bus is 8 or 16 bits, in a MOVB to F132, the lower byte would be irrelevant.
A helpful side effect for me.. Also I can't find any documentation that those addresses were reserved.
HOWEVER, back at the top of SETIT, it does a
SETIT MOVB @CBHFF,@CNTREG TEST, STOP CLK, INT SET, INT STOP CLR @CKSTRG NO INTERRUPTS MOVB @CBH05,@CNTREG NORMAL, STOP CLK, CLK SET, INT STOP MOVB @CBH01,@CKSTRG 24 hour mode, leap year CNTREG is >F130 CKSTRG is >F13FThe TMS9995 would take this as CLR @>F13E.. which is the above address where it wrote the Days units. Huh?
FYI. CKSTRG has two meanings here -
With F in CNTREG, then CKSTRG is the interrupt control register (which we want to clear).
With 5 in CNTREG, then CKSTRG is the clock setting register (which we want to set to 1).
Fine. But how does writing to F13F sometimes mean CNTREG and sometimes UNDAYS?
Is there still a bug here? Hardware or software?
That's where I'm stuck.
@InsaneMultitasker , @BeeryMiller
Do you know the answer to this?
For completeness here is the rest of SETIT
* now for leap yr calculation * if the lsb of the 10 digit is 0, then program the leap yr bits * with the 2 lsb's of the units digit * if the lsb of the 10 digit is 1, then program the leap yr bits * with the [2 lsb's XOR bin (10)] of the units digit MOVB @COMBUF+11,R5 MOVB @COMBUF+10,R4 SRL R4,9 test tens digit JNC TIM0DT use the 2 lsbs XOR @CBH02,R5 change it TIM0DT SLA R5,2 now set leap year, start, etc ANDI R5,>0C00 ORI R5,>0100 MOVB R5,@CKSTRG set leap yr MOVB @CBH01,@CNTREG start clock, no ints RT -
1 hour ago, OLD CS1 said:Even with direct reads and writes, since your Geneve 2020 is in FPGA could you not just intercept I/O to the clock chip's address(es) and make use of whatever you want behind the scenes?
Well, that's possible, but it's messy. I'm reluctant to make a big ball of glue in the FPGA. I am striving not to use FPGA for anything if I have a real chip. Since memory-mapping is in the Geneve gate array, it seems fair, but I'm actually taking many fixed memory map locations OUT of my FPGA in favor of just putting mode bits onto the bus.
It's not the computer that's is in the FPGA--its all original chips wherever possible. It's not an FPGA repro.
The only tricky problem with the plain '276 is the fact that 99105 always transfers 16 bits, read or write, while the Geneve's 9995 does single byte transfers.
(I am rolling my own LS612, and DRAM controller, since the Geneve does that, too.)-
1
-
-
7 hours ago, acadiel said:In Fall 1981, TI had solicited list of programs that users wanted for the TI-99/4. Here's the PDF of everything requested.
I read most of this survey. Knowing what random people wanted in 1981 informs my talking points for museum shows.TI, you had pay-dirt, the very first freaking line in your report is DUNGEONS & DRAGONS. I hope you put Kevin Kenney on it right away.
As I scan through, I get the message that people wanted stuff they saw on other computers in 1981. A surprising lot of folks asked for assembly language, and something very like Mini Memory. Sure, word processors and spreadsheets are eternal. What about the games?
A lot of the game requests seem to me to be aging 1980 Apple ][ and Atari coin-op titles. Only one each reports PAC-MAN TYPE GAME or GOBBLER! In 1981, the Apple ][ scene was brimming with riotous variety, yet folks here were asking for late-70s games like Scott Adams, Star Raiders, Invaders, early Sierra graphics adventures...
Wizardry was 1980, but in 1981 came Wolfenstein, Ultima, Bilestoad, Robotwar, so many more--just google for Apple II games 1981. Perhaps this survey was only delivered in September 1981, using rather older data...
Was this TI's first internal clue that they needed to bring in some 3rd party publishers?
We really needed ANOTHER QUALITY GAME LIKE THE ATTACK. I liked that one, too.
TEXT TO SPEECH WHEN IS IT COMING
We still ask this question.
I scanned for famous names. And I found a few! and some more requests that just made me smile.
Such as:
P.66
SSTV FOR HAM RADIO SLOW SCAN TELEVISION
AT THIS TIME A ROBOT SS TV CONVERTER 4-K
MEM STORGE I THINK SELLS FOR $800MOORE JR, SAM
SHERMAN TXWasn't somebody talking about SSTV on atariage a short while ago?
and this one below it
HOW DO YOU FILL UP THE SCREEN W/HEXAGONS
Yes, we all want Dungeons & Dragons or at least Avalon Hill! We'll make one ourselves!
p.68
SCOTT ADAMS ADVENTURE MFT ADVENTURE INTL
GALACTIC TRILOGY MFT BRODERBUND
HAUNTED HOUSE MFT CREATIVE COMPUTINGPINCUS, SAM
HINSDALE, IL
Nearby:GAMES WITH SPRITES
p.50 or am I mixing up James Postle Sr?
PROGRAMS IN MATH OR SCIENCE FOR STUDENT
TUTORIAL ALLOWING TEACHER/STUDENT TO
INPUT QUESTIONS WITHOUT PROGRAMMING EXPPOSTLE, JOHN P
HAMBURG, NYp.71
FACTOR ANALYSIS/PRINCIPAL COMPONENTS
MUSIC EDUCATION-K 1 2 BASIC CONCEPTS
SCHOOL MANAGEMENT BUS ROUTING ATTENDANCECLULOW, JOHN
PERRYSBURG, OHNow I want to make John Clulow's day by making a PCA package...
What was his background?
Sadly, I don't see anybody foresee to ask for FORTH. A couple of FORTRAN though.
But on p.82
RADZAI, DR FRANK R asks for "A COMPUTER PROGRAM THAT WRITES PROGRAMS"
And then, SANTOS, HECTOR asks for THE LAST ONE FROM ENGLAND.
What is that? Another dungeon adventure game? No, it's a program that writes programs!Here are some fascinating accounts of THE LAST ONE (found using googles.) You decide.
https://stackoverflow.com/questions/1293278/what-became-of-the-last-one
http://www.tebbo.com/presshere/html/pw8102.htm
https://teblog.typepad.com/david_tebbutt/2007/07/the-last-one-pe.html'Scuse me, I have to go flog some 4GL tyres.
Spoiler(No, I am not the E OLSON on p. 49)
-
4
-
-
On 10/8/2020 at 4:49 PM, GDMike said:Oh..I just found out they were MM58167AN
5 for$25 from here.
https://www.ebay.com/usr/myparts1111
I found my 5. They are 58167. Not sure the difference.
I learned a lot from reading about those. They are different though.
Here's what I learned:
The MM58167 has several interesting features that the '274 does not. However, it's not register-compatible AND it has no years (why?)The BQ4802 isn't register compatible, but has some good features. It's great in the IDE card!
I made this comparison of the 3 chips:
Features
274C 167 BQ4802 ===== ===== ====== '274 Compatible Yes No No Registers 16x4 32x8 16x8 Resolution (s) 0.1 0.001 1 Years 0-99 No 0-9999 Leap Day Yes No ? Periodic Interrupt 0.1-60s 0.1-1M 31us+ Alarm No Yes Yes Wake-on Alarm No Yes Yes Reset Output No No Yes Watchdog No No Yes NVRAM No Yes External Packages DIP16 DIP24 SOIC28 PCC20 PCC28 Availability NOS $7 NOS $5 TI new $15, 3.3V is $6Register Correspondence to '274: 274 has 4-bit regs, 167/4802 have 8-bit regs
D0=LSBit D7=MSBit 274 167 BQ4802 === === ====== 00 control complicated 0E complicated 00-D3 rollover 14 D0 (LSBit) n/a (set lock bit before reading) 01 tenths 01 D7:4 n/a 02-03 seconds 02 D6:4, D3:0 00 D6:4, D3:0 04-05 minutes 03 D6:4, D3:0 02 D6:4, D3:0 06-07 hours 04 D5:4, D3:0 04 D5:4, D3:0 08-09 days 06 D5:4, D3:0 06 D5:4, D3:0 0A-0B months 07 D4, D3:0 09 D4, D3:0 0C-0D years n/a 0A D7:4, D3:0 0E weekday 05 D2:0 08 D4, D3:0 0F setting 0F D7:4, D3:0 centuryConsidering that, I have to go with the MM58274 for MDOS compatibility, with an option to add-on the '167 for wake-on-alarm.
I really like the prospect of a wake-on-alarm, to start up the computer. The 9901 already has an adequate periodic interrupt.
It would be wasteful to include both chips, but, the '167 add-on could function just as an alarm or millisecond
timer. An alarm-set or timer-start subroutine would synchronize the '167 to match official time from '274. Including both chips would be like paying at least $12 for an RTC.Still, the '167 PCB location could be left unpopulated. Though a DIP-24 is pretty big (PCC28 socket is about half).
Summary
Geneve 2020 decision:
If there were no need for compatibility, I would go with Shift838's module that implements the BQ4802.
Unfortunately, MDOS uses direct read/write for everything except "set date/time from string" XOP. An XOP can be patched
in my BIOS, but not direct read/write (esp control bits) without more FPGA magic than it's worth.As usual, it's been really fun learning about old chips.
Further reading
Other NatSemi chips:
http://bitsavers.trailing-edge.com/components/national/_dataBooks/1993_Real_Time_Clock_Handbook.pdf
Has application notes for '274 and '167
DS8573 is a lot like the '167, but maybe compatible to PC/XT.
NS32FX211 is new for 1993, seems compatible with '174
Read about how 32.768MHz is scaled down to 10 Hz!
-
1
-
-
So about those new floppy disks...
I searched for "Centech color 5.25 floppy". These were the first floppies to come in colors other than black. They took out a full spread ad in 99'er. It was beautiful. GADEGO ordered a box of 100. We added our own labels to them. The Cyan colored floppy matched the TI background color. I still have those.
Unfortunately, I only found these, in a warehouse in Forth Worth.
https://cfusion.com/inventory/54149.000
Cruel cruel world. One wonders how this happened, perhaps in the desperate final days of 5.25" media.
-
2
-
1
-
-
1 minute ago, adamantyr said:I'm disinclined to re-engineer the game at this point for that.
I didn't mean run from cartridge, just an installer program. Maybe a project for someone else; no changes to the game, just a floppy maker. On your poll, was the "cartridge" option just a trial balloon?
-
23 hours ago, adamantyr said:Making stickers for floppy disks is totally doable! And a good idea.
I should do a poll here on the forums for the media questions... It's the 99'ers who would have the most vested interest. Any retro CRPG enthusiasts on other platforms (and there's more than a few on my Twitter) will probably be cool with the digital version and a box of stuff without media unless they WANT to run it on hardware.
I originally was going to just distribute the game for free, actually. But after spending all this time and realizing there is a sizable retro CRPG community out there that is actually trying to make some money, I realized it would be bad of me to do that. It would marginalize all the hard work everyone does.
I'm with Ksarul - this is in the league with Dragon's Lair and I will order multiple copies. (Not profiteering)
I was thinking, if you were to make a cartridge for the main program loader, could it also create the floppies, if the flash were big enough (I guess 2048K?)
That way, making floppies would be all in-system for TI-99/4A owners.
-
Received these little cuties today:
The TI SN76488 predates the SN76489 sound chip that we know and love. SN76488 is the SN76477 plus internal audio amplifier.
It is a mixed digital-analog chip with 3 generators: 1 tone, 1 low frequency output, 1 noise. As shown the example circuit, it takes a great many external components to unlock all its potential.
As an example of what it can do that the SN76489 cannot, the SN76477 has a VCO, or voltage controlled oscillator, allowing
analog control over frequency. (2.5V in=higher frequency, 1V in=lower frequency). Like the SN76489, it produces a square wave output.
There is another generator, the SLF, which is a triangle wave generator. Triangle waves are not too different from square waves, but they dampen off the higher harmonics. The SLF can be added to the VCO frequency input, to add variation such as vibrato. At higher frequencies, the SLF would produce FM modulation effects that change the harmonic content significantly. The SLF and VCO can be controlled by an external voltage knob, or some other waveform. Both can be played out of the mixer. The chip also has external filter hookups, like you'd find among the filter knobs of an analog synthesizer.
VCO square wave output, when frequency-modulated by the triangle SLF wave.
Why was the SN76489 used instead?
Implementing the SN76477 would not have been practical in a digital home computer. It relies on a lot of external knobs and switches, which you couldn't have replicated cheaply in digital, programmable logic. (you would need a lot of DACs, or at least resistor ladders.) For this reason, the SN76489 was a clearer choice for home computers.However, the SN76477 could have formed the basis of a cheap analog synthesizer. Except that it was difficult to get the pitch musically correct (my brother tried, for countless hours, to tune resistor networks by ear, to produce a proper keyboard scale from 555s. When your resistors are cheap 5% ones, they are tough to get right.)
Uses
Most famously, the SN76477 was in "Space Invaders." The missile firing sound is like the "Gunshot" in the toy below:
I think the SN76477 is the chip that was in the toy 'Sound Gizmo' in 1980s. My brother had a Sound Gizmo. The list of starter settings on the right show the appeal to boys: Jet Plane, Phaser, Explosion, Gunshot.. Train, Helicopter... I might still have cassette tapes of stories I recorded with the effects. That would be in a desk drawer with my TI program recordings.
Here is a video of Sound Gizmo, which if I am correct, demonstrates this chip.
Axesynth, the "Atari"
The band MuteMath employs home-made electronic sounds in its music.
Watch their video "Reset". Starting at 3:63, you can hear some great sounds from the 76477 from the Axesynth.
Later I think I hear some effects pedals on it (echo, feedback) Can I call it a Gatari?
TI Example Circuit
Here are some explanations of what the knobs and switches are set up to do:
Knobs are Potentiometers, which vary a resistance. Their symbol is a resistor with a slidy arrow.
A resistance and a capacitor usually occur in pairs to control one feature. Working together, they establish a time constant for
charging or draining an internal voltage. I don't know what it means that the resistors also have a disconnect/connect switch.
Maybe there is an internal resistance in parallel.
SW1 goes to a "one shot", which produces a single logic pulse when SW24 is pressed.
Knob 1 changes how fast it recharges, so the pulse repeats at adjustable intervals as long as you hold down the button.
SW2 chooses one of 5 capacitor values for the SLF.
SW3 connects a potentiometer (variable resistance knob) to the SLF.
SW5 chooses one of 5 caps for the one-shot. SW24 chooses its resistance.
R6 is the pitch knob for the VCO. SW12 engages/disengages it.
Alternately, SW8 and R12 supply an external VCO control. Not sure how these are different...
SW7 chooses one of 6 caps for the VCO control.
SW8 chooses either a pot or grounds the external VCO control.
SW9 connects one of 5 resistors to pin 11, the amplitude control of the noise.
SW10 engages a potentiometer onto the attack control of the noise. (rising amplitude)
SW12 is an on/off switch and a knob going to the decay control.
SW11 has 6 values for capacitance. Together these could make a variety of timers.
SW18 toggles the envelope generator between attack and decay.
SW20,21,22 switch on/off sources to the mixer: Noise, SLF, VCO.
The mixer is actually a digital-AND. So if the SLF and Noise are selected,
Here, the SLF silences the Noise or VCO when it is low. (You can change the duty cycle or on/off% with a knob.)
At low frequencies, this produces sound pulses (suggest choo-choo puffs.) At higher SLF, it would sound like
a machine gun or massage shower-head.
To achieve actual mixing of two sounds, TI suggests adding an external multiplexer with a frequency beyond human
hearing range. This would chop between two mixer configurations, which is a crude way of getting two sounds to overlap (an external cap integrates the two.)
FM synthesis?
VCOs in series and/or parallel can implement FM synthesis.
The combination of SLF+VCO on the SN76477 comes close to one 2-operator FM channel, which was a staple on the PC more than a decade later on the YM2413, or OPL2, in Sound Blaster cards (granted those use sine waves, but triangle modulating square should be much, much crunchier.) But unlike the OPL2, you could input any external waveform into the VCO's external modulation pin (just make a sine wave with an external oscillator).
Chaining together multiple SN76477s, you could build any pattern of FM operators, like the "algorithms" of the world-famous DX7, albeit with crunchy square waves. For instance, you could set the SN76477 to feed back into itself. Or the output of one SN76477 could modulate another:
self-feedback -\/\/\---- | | --> VCO-----> VCO -> audio output Chip 1 Chip 2 OR self-feedback -\/\/\---- | | --> VCO------- Chip 1 | | adder | |\ --> VCO--------> | > ------> SLF -> VCO -> audio output Chip 2 | |/ Chip 4 | --> VCO------- Chip 3More Reading
General
https://en.wikipedia.org/wiki/Texas_Instruments_SN7647
TI Applications Manual
Axesynth, the "Atari"
https://enacademic.com/dic.nsf/enwiki/9869159
Popular Electronics review/datasheet
https://datasheetspdf.com/pdf-file/506802/ETC/SN76477/1
Space Invaders
Page 5 of the schematic shows the SN76477. It has few inputs used, compared to the example circuit.
Breakout board from BGMicrohttps://www.bgmicro.com/ACS1322.aspx
They marketed the chip, surplus, in 2008? with a PDF (more than the stuff above.) Trying to locate that pdf!
-
7
-
1
-
-
On 10/16/2020 at 4:39 PM, Nick99 said:Wish I could have done this music on the TI or Geneve, instead I had to make it on my iMac. Pardon my crappy video. 😂
Gave it a listen just now! Fun!
If you want to send me a MID file or Garage Band, it can get in the queue for first song to play on my sound chip project!
I have a process to convert MID to FORTI data (used it on 99damashi for the Katamari theme)
-
4
-
-
On 10/28/2020 at 4:25 PM, BeeryMiller said:There was also McCann Software Forth for the Geneve. Several commercial applications were written by Mike for the Geneve including The Printer's Apprentice (TPA), and The Geometer's Apprentice (TGA). There may have been some fonts that went along TPA.
BeeryIf the existing FORTHs don't have all the XOPs implemented, it would be possible to write FORTH words to do them, using the FORTH assembler vocabulary. For instance, add more ways to allocate memory pages from the system, etc.
I am not familiar with either McCann or Bill Sullivan (FDOS)' FORTH.
I've gotten back up speed writing in fbFORTH for the 4A (and other systems), but I do not have a FORTH for Geneve here.
-
1
-
-
September 1983 in Mini-Micro Systems Magazinep.63 Wang makes a 64Kx9 SIMM memory module using TI surface mount packaging: PLCC and ceramic LCC, saving 50% of board space for $1 premium. TI is to qualify PLCC for stress-tolerance on PCBs for Wang, and hopes to manufacture the Wang parts for a wider market.
p. 122 A plasma screen uses 32 Texas Instruments driver ICs to reduce cost and bulk.
p.
Fluke 1722A uses a TMS99000 in a rack-mount module for factory automation, for $8000. It is backwards compatible with the Fluke 1720 which used the TMS9900. It includes IEEE-488 and RS232 ports.Nonvolatile, Bubble memory lets it be used in harsh environments. The bubble memory can serve as 512K or 1.3M of disk storage. Floppy is standard, Winchester is an option.
The Fluke 1722A has a touch-sensitive panel with 60 spots, in front of a 9" CRT.
p. 266 TI offers the model 707 teleprinter for $695. It fits into half a briefcase. It prints 5x7 characters at 45cps, in 80 or 132 columns, on 8.5" paper. 300-baud modem is built in, acoustic coupler is optional. A slot for "Auto Access solid-state software cartridge" can hold phone numbers and log-on sequences.
p.279
TI introduces TMM40042 RAM cards for Multibus systems. 128K, 256K and 512K versions cost from $860 to $1699. Memory cycle time is 303ns.p. 289 Recruiting ad for software engineers touts TI's Navstar Global Positioning System. Software positions available in Dallas for Pascal, C, Ada, Jovial, and assembly language; VAX VMS; real-time guidance systems; HDL, RTL, CAD, VHSIC HDL.
-
1
-
-
7 hours ago, arcadeshopper said:You need a rgb analog monitor with a 15khz refresh rate. Basically the same as an Amiga or old Mac. But with an entirely unique connector.
To do hdmi you can get one of these and a scart to hdmi box
https://shift838.fwscart.com/SCART-Genie_9640_V2/p5569983_18571176.aspx
I prefer to use a Samsung 910mp lcd that is the proper 4:3 ratio and has scart already.
Can you point to a good reference for switching the Geneve from composite/pal over to RGB?
Like us on Facebook
Follow us on Twitter
AtariAge on Instagram
Watch us on YouTube
Chat on Discord
Geneve Questions!
in TI-99/4A Computers
Posted
Beery, can you check my code in the file SRCS above? I put it together from bits I found on my floppy disks.
According to GenPROG, it's harmless to allocate pages where you already have pages (it just fills holes). I'm not sure I ever used that .. I actually used BSS statements, a holdover from GPL programming.
So to fill up the whole 64K with RAM, I think I make sure that pages are allocated up to >07, then map 1-7.
Also I don't actually have the LIB_MD library, I just thought I would copy that example in.