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FarmerPotato

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Posts posted by FarmerPotato


  1. Nuggets from Mini-Micro Systems magazine, Jan-August 1983 

     

    I browsed through issues of this magazine from 1983, looking for mentions of Texas Instruments. I found mentions of chips from the TMS9918A and TMS4416, TMS320 DSP to the TMS99110. Along with many other news items you may find interesting. 1983 was an interesting year this far. 

     

    Looking through the whole magazine was like a history lesson (biased by the need to market products.)  Winchester, TIPC, 990, DEC, CP/M, VisiCalc, and the looming dominance of the IBM PC.

     


    Jan 1983   http://bitsavers.org/magazines/Mini-Micro_Systems/198301.pdf

     


    Computer systems feature mass-storage capabilities


    The business system 800 series of multitasking, multi-user mini- computers consists of six packaged computer systems. Data storage capabilities range from 80m bytes of formatted data storage in the system 861 to 238Mbytes in the system 886. The computers use the high-speed 16-bit model 990/12 processor and 512k to 2m bytes of error-correcting memory. Each 800 series system, in its minimum configuration, includes two model 911 video display terminals that feature high-resolution display screens, upper- and lower-case ascii character sets and separate cable-connected keyboards with 10-key numeric pads and special function keys. The business system 800 series supports the DX10 and DNOS operating systems. Both operating systems support COBOL, FORTRAN, BASIC, RPG II and Pascal programming languages. Available utilities include a data dictionary, a database-management system, a query language and word-processing capabilities. Prices range from $51,000 to $86,000 in single-unit quantities. Texas Instruments Inc., P.O. Box 202146, Att: H-636, Dallas, Texas 75220 

     

    TI-Business-System-800.thumb.PNG.fe869efadad25b8bd0c35798ee2dfe30.PNG


    February 1983   http://bitsavers.org/magazines/Mini-Micro_Systems/198302.pdf


    Ads for TIPC. 4 pages ad "When are logic arrays logical for me?" feature "RTC Answermen" on TI logic chip design.  TAT002-020 gate array series offer 280 to 2000 gates in LS, S, and AS families. Manufactured from your HDL files.


    There are a lot of features on Winchester disks this month. TI is named "second source" for 5.25" Seagate ST502.  TI sells it in their model 525/61 (6 MB) and /122 (12MB) for ST412-compatible systems. Their 8-inch WD 800-18M and 43MB are sold only with TI 990 CPU interface.

     

     


    March 1983 http://bitsavers.org/magazines/Mini-Micro_Systems/198303.pdf

     


    "TI's advanced microprocessor peripherals"


    pp. 65-68


    Full pages ad spread for TI's modem on a chip, 99532/3


    Also TMS9909 floppy controller, TMS9914A GPIB controller, TMS9918A/28/29, and TMS9937 for EIA RS-170 (security monitors).  Next page features 8-bit A/D converters TL520, etc.


    On p.146 modem pictures include Racal-Vadic VA212. "Prices range from $760-$1645"

     

     

    April 1983   http://bitsavers.org/magazines/Mini-Micro_Systems/198304.pdf


    pp 59-60. Article covering TI PC introduction. p.22 notes the speech recognition option uses a TMS320.  Color ads for TI PC on pp 62-63


    An article on p.107 states that in PLC (programmable logic controller) TI is #3 with 11% market share.


    An article on minicomputer market ranks vendor by sales from 1981. DEC is #1 with 73,000 minis sold, while TI is #4 with 10,800 units. 

     

     


    May 1983   http://bitsavers.org/magazines/Mini-Micro_Systems/198305.pdf

     


    Concurrent CP/M is announced in OEM versions for 8086 computers. TI is one of the licensees. Suggested price of $350.


    p. 87 "this monthly table lists [financials] for computer industries."     "Texas Instruments Inc. reports that the only bright spots in its fiscal year were the garnering of large government contracts and increased home computer demand."   For 1982, they were #3 in earnings with $144mm, but all are dwarfed by IBM's $4.4 billion.


    p.225 Spectra Logic advertisement mentions their disk and tape controllers for TI minis.

     

    DiskTape.thumb.PNG.4f16db3234ce2b785c39741e18ef8651.PNG

     

     


    June 1983   http://bitsavers.org/magazines/Mini-Micro_Systems/198306.pdf


    p. 239 is an article on the myriad uses of bar code technology. Not just for inventory management,


    "In consumer electronics, hand-held wands skim across bar-coded booklets with Casio electronic organs, Texas Instruments Inc. talking books for children and HP programmable calculators."


    p. 295


    Board for TI Professional runs CP/M programs


    The Baby Tex co-processor board for the Texas Instruments Professional Computer enables the computer to run CP/M software application programs under the MS/DOS operating system. The Baby Tex board features a Z80B microprocessor and includes 64K bytes of additional system memory, which is accessible to a user even when Baby Tex is not in use. The Convert program supplied on a 5.25-in. floppy disk with the Baby Tex hardware adds a special header to a user's CP/M program and formats his disk for MS/DOS. When a user runs a converted CP/M program, the header instructs the Professional Computer's 8088 processor to load his CP/M program into Baby Tex and then stand by to handle all keyboard, screen and disk drive functions. Baby Tex's processor then executes the CP/M program and delegates all I/O functions to the Professional Computer's 8088 processor. The result is that both processors execute simultaneously under a single operating system. In single-unit quantities, Baby Tex is priced at $600. Baby Tex is also available bundled with the WordStar, MailMerge, Personal Pearl and WonderCalc programs for $995. Xedex Corp., 222 Route 59, Suffern N. Y. 10901


    July 1983    http://bitsavers.org/magazines/Mini-Micro_Systems/198307.pdf


    Graphics Issue


    pp.97-100 Ads featuring new TMS4416 in Tektronix 4115B graphics terminal, a 1280x1024x8bpp (24 bit palette) color raster display. In 1983!!! That would be 160 chips to make 1.25 megabytes! "Each TMS4416 replaced four TMS4116". It is also offered in a smaller chip carrier. 


    TMS4500A DRAM controller refreshes 256K of DRAM. (I guess Tektronix needed several.) TMS4164-120 speed is now available with a single 5V supply. TMS4016 2K static RAM. TMS2150 is a memory cache. With 512x9 array plus external SRAM, it used to eliminate wait states.

     
    An article on Intel CMOS RAM compares TI.

    DRAMs.thumb.PNG.ea1001f9ddf403d590beaf10b710104d.PNG                                  ChipCarrier.PNG.a3f9d45afe332b377712dc61f5ed6097.PNG

     


    August 1983   http://bitsavers.org/magazines/Mini-Micro_Systems/198308.pdf


    p.126 Mention that of course Texas Instruments networks its factory floor PLCs


    p.269


    CPU board features I/O expandability


    The TM990/103 microcomputer module includes the 16-bit model TMS99110 microprocessor with macrostore memory. Macrostore is a memory space for frequently used functions or algorithms that can be accessed at full processor speed-167 nsec. at 6 MHz. The lK-byte macrostore ROM located on the TMS99110 chip is programmed with single-precision floating-point instructions that make the TM990/103 well-suited for high-precision, computation-intensive applications. Primarily intended for use as a high-speed process controller, the TM990/103 has 17 interrupts, 15 of which are maskable. It also has two programmable RS232C ports with baud ranges of 110 to 37.4K baud. On-board communications register units provide serial and parallel interfacing. The module features onboard expansion of I/O via two IEEE P959 bus-compatible sockets. The module's memory can be expanded via memory expansion platforms that plug directly into existing RAM, ROM and EPROM sockets. Memory-expansion platforms provide as much as 64K bytes of RAM, 64K bytes of EPROM or macrostore ROM or various combinations of memory on a single platform. The TM990/103 has an 87-member instruction set that includes instructions such as signed multiply and divide. Available software includes the PDOS disk-operating system, the UCSD p-System and TI Microprocessor Pascal. Prices of the TM990/103 start at $1660 in single-unit quantities. Texas Instruments Inc., Semiconductor Group., P.O. Box 401560, Dallas, Texas 75240. 

    • Like 3
    • Thanks 1

  2. I’ve practiced tacking down two corners with an iron before using solder paste. Cuz mine sometimes sail away with the hot air flow, as the paste starts to liquify. Sailing, on the solder sea...
     

    I haven’t tried tack Flux, but I hear it helps with the chip skating. 
     

     

    • Like 2

  3. 19 hours ago, Fritz442 said:

    Hey all,

    I am in need of some PAL\GAL chip testers. I have manually decoded the following PAL's:

     

    ...

     

    What I need is people that can program these into some GAL16V8 chips and install them on boards to test.

    I have tested all them on my boards successfully but would like more board testing. I have both the

    PAL and GAL converted files.

    Please PM me if you can test any of these. :thumbsup:

    I have some GAL16V8, can program, but I can only try the TI cards.

     


  4. Thanks to the kindness and support of jbdigriz, I have cpus again.

     

    I had two of his to test.

     

    Then a surprise by speedy mail from China (est Nov 30, actually just 14 days)

    And I found a seller in California.


    For future comparison, here are the markings:

     

    Markings on CPUs I have
    
    TMS99105AJDL
    
    P1  CM 9123 c 1981 TI 0408068 TAIWAN   ordered 2019.  6V applied, not ok?
    P2  CM 8939 c 1981 TI EU02992 TAIWAN   
    J1  MC 8925 US02240 c 1981 TI TAIWAN   where did I put it?
    J2  QC8842 5817 c 1981 TI PHILIPPINES  
    Q1  MC9230 c 1981 TI US03847 TAIWAN   
    Q2  MC9230 c 1981 TI US03847 TAIWAN   
    Q3  MC9230 c 1981 TI US03847 TAIWAN   
    
    
    
    P polida2008 ebay
    J jbdigriz   atariage
    Q qsourceco_6 ebay

    IMG-1386.thumb.JPG.6c512b7b4f655be27a9d524dd39cce05.JPG

    • Like 4

  5. 2 hours ago, TheBF said:

    Well... I have code on Git but I am not an expert.

     

    The tool I use is a cross-compiler I wrote that runs on DOS. :) 

    (I have been threatening myself to move it to GForth so it would be more portable.)

     

    I think you have given me what I need to make a kernel however I will need to give you the cross-compiler and the source files and a batch file for you to build it as well.

     

    I am a bit of a square peg I guess.

     

    Right,  I remember you saying that.

     

    There are a couple more things.

     

    Take a look at the memory map in the Appendix I linked.

     

    The interrupt and XOP tables are reserved, >0000 - >7E

    ill be working on interrupt handlers above that chunk. 

    >800 - >FFE is macrostore.

    1000 is additional macro store (They are unified on one flash ROM.)

     

    It would be best to start your code at >1400

    Of course, with the reset vector pointing into it.
     

    I can merge a binary with yours and replace those chunks. 

     

    RAM is from >8000 - FFF8.

    more on that 

    safe to say 9000 upward is free. 
     

    there is paging. Rom in 4000 to 7ffe. Ram in c000-fff8. More on that later if needed. 
     

     

     

    • Like 1

  6. 42 minutes ago, TheBF said:

    So it boots from a vector at >0000 ?

     

    Yes, just like 9900, RESET pin.   There is a slow pull-up just like the 9904 in the TI-99/4A, except it goes through the 9904, which is cleaner.

     

    The debugger console is a 9902 at cru >1380 (in other words RS232/2) . I can only use serial I/O for the time being--VDP and PS/2 keyboard support is a long way off. I need to interactively write it! Thats why FORTH is so great!

     

    Serial code should be identical to any other 4A serial code, but probably best not to turn on any interrupts. 9902 Clock input frequency is the same 3 MHz as the 4A, so same register values.

     

    An LED is anywhere in the >1300 block . SBO on, SBZ off. So 4A style SBO 7 will work. There is no DSR to enable.

    LI R12,>1300
    SBO 0   * on
    SBO 7   * works too
    SBZ 0    * off

     

     

    VDP is not ready yet. There will be a way to map the VDP into >8800, >8C00 like GPL mode. Or >F100 like MDOS mode.

     

    There is also a weird new way to get to VDP:

     

    * Set VR#7 to screen color white-on-blue, using CRU byte-parallel
    LI R12,>8C02
    LI R0,>F407
    LDCR R0,2      * a lot like MOVB R0,@>8C02
    SWPB R0
    LDCR R0,2

    The CRU parallel address is intentionally the same as the memory-mapped port, because then the same address decoding gets reused!

     

    All the VDP-by-CRU routines  are demonstrated in this src file:

    https://gitlab.com/FarmerPotato/geneve2020/-/blob/master/src/bios/stdlib.a99

     

    The "Editor/Assembler" manual is here:

    https://gitlab.com/FarmerPotato/geneve2020/-/wikis/X.-Appendix-Reference-Tables

     

    All Wiki, home page: 

    https://gitlab.com/FarmerPotato/geneve2020/-/wikis/home

     

    Repo here

    https://gitlab.com/FarmerPotato/geneve2020/-/tree/master

     

    Send me a gitlab username, and I'll give you write access.

     

     

     

    • Like 2

  7. 31 minutes ago, TheBF said:

    Tell me when you need a Forth Monitor for this beast and I will make it for you.

    Yes, definitely!

     

    I am testing a very short program so far

     

    *
    * first test
    *
    
    biows equ >8000
    intws equ >8020
    lights equ >2200
    
     aorg 0
    
     data biows,reset
     data intws,int
    
    reset
     limi 0
     mov  @4,@>FFFC
     mov  @6,@>FFFE
     li   r12,lights
     sbz  0              led
    loop
     limi 2
     limi 0
    * 128 nops. look for instruction >1000
     nop
     nop
    * ...
    
    b    @loop
    
    int
     li   r12,lights
     sbo  1              led
     rtwp
    
     end

     


  8.  

    IMG-1375.thumb.JPG.a88d288fb7fb5d559a3c2d6ff722364d.JPG

     

     


    This is the Geneve 2020 prototype I've been working on.


    Pictured here are the cards for CPU (white) and I/O (black). They are still in the board bring-up stage.

     

    The features you can see here are:

    • 8-slot backplane.
    • CPU and I/O cards.
    • Card panel RESET and NMI buttons.
    • I/O connector for FTDI (serial to USB cable) and/or PMOD accessory.
    • Steel Hammond case
    • Tough acetal plastic (laser-cut)

    The backplane is Kontron, compatible with retrobrewcomputing.com cards. The chassis can be used for Eurocard full 160x100 or half size 80x100.
     
    Front panel, (top to bottom) : 

    • Lighted power switch (you can choose any E-switch type)
    • VGA, Serial ports. 
    • Slots for Micro-SD reader, Two MMC slots (or use Micro-SD adaptors).
    • Two joystick connectors.
    • Connector for 4A keyboard.
    • Holes for AC97 phono jacks, PS/2 keyboard+mouse jacks, MIDI In/Out.

     

    All cards may have connectors and LEDs on their front. A back panel is possible, for VGA/serial etc.

     

    I put a big emphasis on keeping costs down.   All the materials for the physical case and backplane are off the shelf. They cost about $120, plus $35 for the Pico power supply. The biggest items are the steel Hammond case ($50), Backplane ($40 with 8 slots). Parts assemble by snap-fit or screws.

     

    You will be able to put the backplane in a PC case+power supply, saving $85. A minimal system could also use a 4-slot backplane.

     

    After the debugging stage, cards will be combined onto 160x100mm Eurocard full size.

     

    I'm really happy with how it turned out. 
     

    -Erik

     

    • Like 8
    • Thanks 1

  9. As for TI-Net BBS, I only knew to make it cycle through baud rates when it received garbage other than CR. I was copying FidoNet. Later, I seem to recall that modems had a config register, which made the connect return code 0 or 5 To indicate the baud rate? It’s fuzzy but y’all make me remember long buried memories! (Matt only had a 300/1200 modem and I had 300 Hayes)


     

    there are techniques for looking at the first bits or framing error, to guess the baud rate. I read that somewhere recently...

     

    I have read the 9902 data book now. No way I could have understood that when I was 14 trying to struggle through the E/A manual.
     

    Back then I cribbed everything from the TE3 source and later the XMODEM and Fast-Term source. Nothing original in the TI-Net serial routines. 
     

    • Like 1

  10. Well dang... I searched for 507100 yesterday on eBay and there weren't any bargains. Then last night, I saw a seller added more inventory,

    including a 507100 and SB30xxx. $24 and $12. The top two on my "needs" list.  So, I will have 2 matching sets of bit +sleeve. 

    One set of Jonard brand, and one Cooper Tools! I feel lucky.   It is personal tools from a retired EE: tools going back to the 70s.

     

    Wire Wrapping Sleeve, 507100 by Wi

     

    Wire Wrapping Bit, SB30MSH-B by OK M&T, 30 AWG

    • Like 2

  11. Does anybody know about wire wrap bits and matching sleeves?  I'm trying to get a pair, at an affordable price (say $25 each)

     

    If  want to learn something about wire wrap, for constructing circuit board prototypes, try these great tutorials:

    https://www.specialized.net/tools/wire-wrap-tools.html

    https://docs.rs-online.com/dc28/0900766b80565423.pdf

     

    YouTube:

     

     

     

    So:


    I have a Cooper Tools electric wire wrap gun. I have one bit, one sleeve, which don't work together. I need a bit, and a sleeve to match. Without that, I'm using my long-time Radio Shack hand tool (the kind that looks like a screwdriver.) 

     

    TI used wire wrap for PLCs and stuff, I guess, from the junk in their dumpster.    When I was 17, a TI engineer loaned me a gun with cut-strip-wrap CSW bit, which was a breeze to use. I will settle for just a wrap bit/sleeve!

     

    Here are the parts I've found so far on the internet:

     

    30 AWG wire, mostly 6-digit Cooper tools brand part numbers:
     
    Summary     Bit             Sleeve
           Have 501097 bit     Need 507100 Sleeve (Cooper) UPC 960948
           Need WB3032M        Have P3032 Sleeve (these are brand OK Jonard)
    ES    Found 511395
    ES     gone 507502
    ES    Found 990063 CSW     Need 990064 with cutter and exit slot     UPC 960740                 
    AP    Found 990063 CSW
    AP    Found 990764 CSW     Found 990765 CSW
    
    VERY LARGE TERMINALS - 0.066" (want 0.031 diagonal of 0.025 post)
    AP    Need 501194 UPC 951908 Found 502129 (normally 24-26 AWG)
    AP   Found 507063
    SP   Found JDV bit SP 53110, $30.50, .047" bit radius, thats .094" diameter, huge
    
    abbreviations
     J    Jonard
    SP    Standard Pneumatic 
    OK    OK Industries
    ES    https://www.electronicsurplus.com/
    AP    https://store.armyproperty.com/
    SP    https://www.specialized.net/tools/wire-wrap-tools/wire-wrap-bits-sleeves

     

     


  12. On 10/12/2020 at 8:01 PM, HOME AUTOMATION said:

    Doesn't sound good... Dunno about the 99105...

     

    However, once upon a time... I inadvertently reversed the high/low AC voltages feeding the P/S, on my new used 4A. It seemed to be running ok. I left it on, unattended for some time. When I returned, I could smell the magic immediately! It was dead.:skull: After disassembling, I found the sound IC had disintegrated, burning a small hole through the PWB. I found the 5vdc regulator shorted, allowing approx. 18 volts DC onto the 5v rail! After cleaning thing up somewhat, surprisingly, all was well, sans sound!

    Pretty hairy, burning through the 76489 (or 94624 depending).

     

    I'm re-testing my CPU on a breadboard. It might be that my cpu board has some fried chips. Maybe they are dead and just putting a lot of capacitance on the cpu pins.

     

    jbdigriz has sent me 2 cpus and I got another from polida2008. I'm into the testing.

     

     


  13. I received chips from polida2008 today. They were expected in November.

     

    The 99105 seems legit marked. The date code is 2 yrs later than the one polida2008 sent me last year.

    It doesn't have a gold line with a dot up to near pin 2. It has the gold line all the way to the end.

    I wonder if these are pulls, not NOS.

     

    The YM2612 sound chips: 3 of them match the guide exactly: they have a index hole punched all the way through. The fourth is identical except for some flashing in the index hole.

     

     

    • Thanks 1

  14. 2 hours ago, RXB said:

     

    Thank you for posting this, Rich. I need to learn as much as I can about avoiding fake chips, because I am ordering many types out of the Shenzen warehouses.

     

    I am disturbed that two of the 9929s in that video came from two sellers I had begun to trust. adeleparts2010 and huayi-components on eBay.  They show large inventories of vintage parts like this. 


    I have V9958 chips from two sources.  The one Stuart Conner sent me, and some I bought through alibaba.com. The V9958 have at least passed the "luminance" test (I'm looking at RGB analog levels out.)   As well as a full memory test. I get  immediate feedback about that, without having to figure out if the video connection is my screw-up. I have spent $310 with 

     

    From polida2008, I have got good chips- my TMS99105 came from there and passed similar tests to the ones in the video. I brought it up by stages on a breadboard. This is encouraging, because polida2008 sells whole kits of vintage chips. Their EEPROM also passed. 

     

    I know from another website, that polida2008 has been burned by suppliers. In the case of YM2612, one of Tursi's favorite sound chips, everybody's supply was poisoned, including polida2008. That seller and others withdrew their fake chips. It was offered cheaply by many back in 2019, and now it is scarce again. I hope it means that the ones left are not fake. So, credit to polida2008. The sellers are not able to test their chips--they get surplus and sell it.

     

    It's my guess that sellers get their parts from the same warehouses or surplus brokers.


    I gather from dealers on alibaba.com, which is the commercial, business to business site, that they call around the warehouses or surplus brokers. Prices are not listed until you query by quantity. Most sellers list hordes of the same stuff, same pictures, same price range (0.25 to 9.95!) You RFQ with your target price, then sellers will aggressively ask you for your lists of needs and try to fill them! I have got multiple quotes on a whole list of chips that way. Once you have purchased on alibaba.com, they follow up every couple months and send you holiday greetings.

     

    Aliexpress.com is the consumer site, where offerings are priced for quantity 1, and "buy it now" is the rule. You can find the same sellers on ebay! On eBay, if you ask polida2008 (or any sellers!) for a not-listed part, they will try to find it. And report back what price they want.

     

    Where does this stuff come from?

     

    Surplus is left over from when contract manufacturers in HK/Taiwan/Shenzen made lots of boards. Sony and Sega console parts, for example. A wide variety of Sound Blaster parts! 

     

    Or they might have come from "midnight runs" by employees at a licensed, legit fab! This is how you get the nonsense date codes, or other numbers. Or they might be factory rejects. 

     

    Who knows if these parts were faked decades ago and have been dumped? Underneath the re-marked labels, some fakes turn out to be re-marked, common, worthless 2K SRAM. NTSC TV decoders, alarm clocks, 82xx parts from the 80s-90s...

     

    My view is that, sellers with 99% feedback are worth doing business with, but even they get burned when the supply is poisoned somewhere up the chain. Get the seller to make it right.

     

    So, back on testing:

    • I worry about not testing chips immediately after they arrive.   
    • An exception:  TI logic chips, brand new from Mouser. They lost their markings from rubbing alcohol. 

     

     

    • Like 2

  15. Trench Run inner loop (Code) (boring!)

     

    Spoiler
    
    
    
    * ZTABLE  64 rays through screen X strike wall at distances Z. Precalculated for every player X[0..127]. 128*64 = 8K. 
    *         Z is capped at 255, infinity. Usually 25% of view shows infinity.
    * YTABLE  For a given Z, the foreshortening factor Y. Y=0 corresponds to 2x, Y=63 corresponds to 0x. 256 words.
    * STABLE  sampling indexes for a given Y. 64x64 = 4K.
    * TEXTUR  row-major, 256x32. 8K. If paged memory allows, could be expanded as far as 2048x32, 32K.
    *
    * Total data: 20.5K. Might add 24K more texture if paged.
    *
    * sprite data
    * per 16x16 ship with 16 scale factors: 1K
    
    
    * R7 is distance travelled so far. Increments by speed. Texture wraps every 256 ticks, to create the effect of movement.
    
    
    * Sampling table STABLE
    * if texture were stored row-major and there were 256 columns, then adding >0100 would advance by one pixel => 16K.
    * if texture were stored column-major, then adding >0001 would advance by one pixel
    
    * A height value is 0-63. It indexes
    * 4K STABLE is 64 tables of 32 entries. Each table's values sum to 32, for sampling a column of the texture. Produces foreshortening.
    * STABLE looks like: 
    * 1 0 1 0 1 0 1 0 1 0 1...1 0 1 0  (64 entries  scaling factor 2.00) (last entry doesn't matter)
    * ...
    * (16 zeros) (32 ones) (16 zeros)  (64 entries  scaling factor 1.00, filling middle half of the column)
    * ...
    * (17 zeroes) (26 ones and 3 twos) ...(18 zeroes)  (64 entries  scaling factor 0.90) (leading and trailing zeroes indicate reduction)
    * ...
    * note: Z height in pixels is the number of non-zero entries in STABLE column
    * last or first byte could store this value.
    
    * draw the screen:
     MOV @PLAYRX,R8    
     SLA  R8,6
     AI   R8,ZTABLE    * R8 = ZTABLE+x*64, a precalculated table of Z for each player x. table is distances at which 64 rays struck the side
    
     LI   R10,32       * # loops on screen column
    
     LI   R0,>6800
     BL   @SETVA       * Set vdp address to >2800 color table
     
    * loop per screen column.  one screen column consumes two *R8+: drawing the even and odd fat pixels.
    
    LOOP
    * evens
     CLR   R3
     MOVB *R8+,R3       * R3 distance at which the ray struck the side
     SWPB  R3
     MOV   R3,R4
    
     A     R7,R3        * add distance travelled down trench
     ANDI  R3,>1FC0     * repeat texture each 8K, or 256 columns
     AI    R3,TEXTUR    * R3 pointer into texture column to sample
    
     A     R4,R4
     MOV  @YTABLE(R4),R4    * YTABLE (words) is height as a function of 1/distance, premultiplied by 64
     AI    R4,STABLE    * R4 pointer into sampling table for this Z
    * TBD: shift up or down, including more or less of the transparent pixels, function of player Y position and z height
    
    * odds: merely change R3,R4 to R5,R6 in the above code
     CLR   R5
     MOVB *R8+,R5       * R5 distance at which the ray struck the side
     SWPB  R5
     MOV   R5,R6
    
     A     R7,R5        * add distance travelled down trench
     ANDI  R5,>1FC0     * repeat texture each 8K, or 256 columns
     AI    R5,TEXTUR    * R5 pointer into texture column to sample
    
     A     R6,R6
     MOV  @YTABLE(R6),R6    * YTABLE (words) is height as a function of 1/distance, premultiplied by 64
     AI    R6,STABLE    * R6 pointer into sampling table for this Z
    * TBD: shift up or down, including more or less of the transparent pixels, function of player Y position and z height
    
     BL   @PAINT
     DEC  R10
     JNE  LOOP
     
    
    
    * fill 64 rows of 1 screen column, sampling and combining 2 columns of texture
    PAINT
     CLR   R1
     LI    R2,64
    PAINT1
     MOVB *R3+,R1      * even color
     SLA   R1,4
     SOCB *R5+,R1      * odd color
     MOVB  R1,@VDPWD
    
     AB   *R4+,R3      * 0100 advances by 256 bytes or 1 texture row (texture is stored column-major) 
     AB   *R6+,R5
    
     DEC   R2
     JNE   PAINT1     * repeat 32 times 
     RT
    
    

     

     

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  16. Trench Run Technical Details (boring)

    Spoiler


    Technical detail:

     

    For each of 128 player X positions, and each of 64 fat pixel columns, there are indexes Z into the textures of the left and right walls. The foreshortening height Y is a pre-calculated function of 1/Z. For every player Y position (Y is up) there are pre-calculated top and bottom screen rows. For each column height, there are interpolating index to sample the texture. 

     

    I pre-calculated the tables already, in a C program.  Walls are painted by a big texture, 256 pixels long by 32 high, with up to 2x magnification closest to you.

     

    Optimizations

     

    Double the texture memory. Pre-shift the texture by 4 bits (>F0 and >0F)

     

    Not re-drawing transparent pixels.

     

    2/3 of the screen is probably excessive and really messes up the pointer math.

     

    Use double buffering. Works on bottom only.  pattern table fixed, doubles as color table in top third

     

    VDP Memory map, by 2K:

    0000 F0 pattern table 2
    0800 --
    1000 color page 1
    1800 --
    2000 F0 pattern table 1 (is one enough?)
    2800 --
    3000 color page 2
    3800--

     

    If some chars are trimmed from bottom third edges, these can be reused in top two thirds.

     

    CPU memory map:

     

    2000 Code (Is it irrelevant to EA5 loader?)
    6000 paged area
    A000 Sprites. (3K) YTABLE (0.5K)
    B000 YTABLE. 4K
    C000 ZTABLE. 8K
    E000 TEXTUR. 8K

     

    If 6000 is paged, it would be 32K TEXTUR data. Each column runs through all 4 pages, causes >8000 bit on increment, use JLT.

    Hey, what if digitized sound were interleaved.

     

    Graphics mode:

     

    The middle third of bitmap mode has pattern table filled with >F0. The screen image table is arranged with >00 to >07 down the first column, and so on. This makes 2 fat pixels columns continuous in video memory, so the column drawing loop sets the address once, then writes 64 bytes of texture data, then another 64... The address is already aligned to write the next column. So the frame rate is determined by the time to do many indexed loopups, OR two texture columns, while writing 64x32 or 2K bytes to VDP. 

     

    There's not a lot of scope to unroll loops. Inner loop is reading index tables.

     

    * texture layout:
    * row-major, 256 x 32 bytes, each byte holding a 4 bit color in low nybble => 8K

    * Z table is 1024 word values, giving a foreshortening factor, which points to an STABLE (there are 64 with scaling 2x down to 0x)

    from precalculated X table for player X=64 (center position): 33 35 37 40 44 48 53 59...37 35 33 (64 entries)
    from indexing precalculated Z table: 0 1 2 4 5 11 17 23...23 17 11 5 0 0 0 0 (64 columns)


     

     

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