FarmerPotato

I think that line goes to cartridge port pin 1, the reset pin. Also on the typeset schematic, C506 has its value in mH. It's not an inductor.

I think it is past time to open up a console, solder on a bunch of little wires, and bring it out to a logic probe header. Yeah! Borg console!

Yes Yes

The startup sequence is interesting. My reset occurs after 10 clock cycles. Figure 3-53 shows the 9900 is about to fetch the new PC after cycle 10.

And Thierry's page answers that: Yes, side port RESET* is an output. http://www.unige.ch/medecine/nouspikel/ti99/tim9904.htm The 9904 FFQ (RESET*) output does go to the side port pin 3. It is buffered twice, though, to add a slight delay (according to the datasheet for 74LS04, about 25ns). I don't see a way that my side port card could be messing with the cartridge port auto-reset circuit, given that side port RESET* is an output. My next working theory is that when the 9900 retrieves the vector at >0000, it sees all >FFFF because I'm messing up the address or data bus somehow. I don't see any information that the 9900 could do anything but lock up in that case, nothing that it do to cause the 9904 to issue another reset. Are there any other ways the 9900 or 9901 can cause the 9904 to do a RESET? maybe a CRU bit? It does look like my console is trying to read CRU in this jam.

Thanks folks. One plan then is to remove all the chips. One focused question is: does the RESET pin of the side port come FROM the 9904's RESET out signal (9904 pin 5 FFQ), or does it go TO the cartridge port pin 1 network that can force a reset input TO the 9904 (clock generator pin 4 FFD.) The TI schematics book doesn't say! The Bunyard manual describes the side port RESET pin as an output, without commentary. And, the P-box interface buffers RESET through a 244, so, I don't see why my 245 buffer is any different. (I use LV245As everywhere instead of LS244s, for the nice pin layout and one less part to order.) I think I did not see the RESET behavior when I had a flaky signal on the 245's OE. If so, the buffer might have been in Hi-Z state. Maybe when active, it is putting a load on RESET? Also, before the RESET behavior, I saw some bad behavior on the A15 line! Programming the MiniMemory resulted in a lot of bad writes to odd addresses. I think it's possible that my LV245A is bad. I have used LV245As successfully up until this revision, I don't think I'm wrong in interfacing TTL out to LV cmos in (The A in 245A indicates 5V input compatible.)

So, for the umpteenth time I have tore down my FORTI-2 sidecar and rebuilt it. The previous board actually worked to spec. It buffered the address and memory bus, and supported the 4A with reads and writes. The current board is causing this awful behaviour where the RESET repeats after a few cycles. I don't know where else to look, but what I don't understand is what normally generates the RESET signal. Maybe if someone could explain that area to me, I would see the solution. Yellow = RESET line. Blue = PHI3 If I remove my sidecar, the 4A is fine. When I connect it, this happens again. Sometimes it just locks up--no RESET* low, but no MEMEN* either. I've checked for shorts. I've checked these signals on other side port pins: IAQ 3.5V MEMEN 5V RESET 5V..0V DBIN 5V..0V A15 0 WE 4.5V PHI3 0-4V CRUCLK 4.5V Address pins show random values with a solid 0-4.5V edge. Actually, A12, A13, A14 are active during the few cycles after RESET. I see some random values on A0, not sure when. HOWEVER the data bus shows >FF during the high pulse of RESET, but it never rises above 1V. I know the D lines should be like 4.5V. My board has 4 74LVC245A birectional buffers. All of them have DIR=1 (away from the console). U1 buffers the Data bus. The DIR pin has a 3.3K pullup to VCC to keep data pointed away from the console bus. I'm driving this to 1 as well. U1 may be part of the problem... OE (in my schematic, DBEN1) was mistakenly routed to another input. I'm driving it from a wire, because floating inputs are bad! On the RESET high-going edge, the output lines echo the weak 1V signal seen on the Data bus pins, even though OE is high! U2 buffers the 8 control signals and has OE=0, which looks good. U3 and U4 buffer 16 address lines, OE=1, DIR=1. I think the board was working before. There was a 3.3K pullup on U2's DBDIR which may have been flaky. I fixed that by replacing it with a shunt. There is also a LV125 3-state buffer driving the CRUIN line, but it is turned off. Here is the schematic (mistakes and all. "corrected" is for the next revision.) Since it's not fair to describe it but not show it. (This is only the interface half of the project BTW) The main idea here is to multiplex and encode all the side port signals into just 16 lines. There are 3 control lines in (DEC), 3 out (ENC), and an 8 bit bus (which switches very very fast). The PLD encodes states of the 4A memory cycle: read LSB, read MSB, write LSB, write MSB, read CRU, write CRU, and the user sends back DEC states to drive the various DBEN1, ABEN1, ABEN2, DBDIR. The previous revision, 0.1, squeezed all the lines onto 24 pins, but failed to meet timing for CRU. One exciting feature is dual DBEN1 and unused DBEN2. This interface is intended to go on the 16 bit data bus eventually.

Think of $ as the label to the left of current line. youre better off using real labels until you really understand how instructions are stored. But The way to be really sure is to look at the listing file to see how many words apart your target is. Some instructions are 2 bytes, but if they have addresses or immediate arguments, these add another word. JNE $+2 is a no-op JNE $+4 will skip over a simple instruction like DECT or A R4,R5 JNE $+6 will skip over LI R0,1234 or MOV R4,@>A000 JNE $+8 will skip over MOV @>2002,@>8C00

Information is scattered around threads like the ROMs thread and older. At least it has pictures of the various carts. Maybe you are willing to gather it together? Along with interviewing folks.

From time immemorial, the starship fleets of the galaxy have clashed in pointless, never ending wars over one beautiful airless moon. Those wars have finally come to an end. The taciturn Dramites have formed a League with the intrepid Parsec force, the Bynites, Urbites, and more alien races who are lining up to join every atomic year. That fateful moon, whose once-beautiful sculptures were totally ruined by falling space trash... Beneath the fateful moon, something is stirring. Encouraged by the smell of destruction, an ancient life-force has broken free of its prison and extended its tentacles in all directions. Now it is mining its world from the inside out, creating a vast living machine out of rock, metal, and flesh, for purposes unknown. You have been sent with an exploratory fleet, to gather intelligence on the life-force. Your fleet contains experimental Parsec 2 fighters, Dramites, Bynites, and Urbite missile cruisers, and some weirder alien craft who we have no names for. Together each has a role to play in exploring... and surviving... the horrors that lie beneath the surface.

holy crap that's a lot of chips. but.. 22LV10C-JU10 is $1.28 at Mouser, so 500x would be $640. This has 5V input tolerance according to the data sheet. I hope you are not going all-in on 22LV10 on just my recommendation. I'm still evaluating them in-system. I've only fully tested at 3.3V. Waiting for cartridge boards.

TheBF said SP EQU 10 Does the job of renaming. R10 is just an equate anyway, enabled by the R option in the original 99/4 assembler. MOV *10+,11 is the eventual syntax. RAG assembler and GenAsm had macros. I see ralph xas99 (from xdt99) has macros. Here I go with xas99 macros. Untested code: * initstack .defm spinit sp equ 10 li sp,stack * push R11 onto stack .defm savert dect sp mov r11,*sp .endm * pop from stack into R11 and return .defm return mov *sp+,r11 rt .endm * generic push <arg> .defm push dect sp mov #1,*sp .endm * generic pop <arg> .defm pop mov *sp+,#1 .endm * rewritten savert, return .defm savert push r11 .endm .defm return pop r11 rt .endm * Example. * Call chain: start -> foo -> bar. * Bar is polite: it saves/restore the register it uses, R12. * That is another use for stack push/pop, given that the stack is deep enough. start: spinit pushrt bl @foo return foo: pushrt bl @bar return bar: push r12 li r12,>1300 sbo 0 pop r12 rt

Here is a (tested) example of using a stack to store return addresses. R10 will be my stack pointer. The stack area is reserved by a STACK BES 2*8 directive so it is big enough for 8 words. BES is like BSS but it sets the label equal to the *end of* the reserved area (the address after). Because we are going to be counting down from STACK. BSS and BES reserve data areas, mixed with your assembled code. In a modern computer, these areas would be somewhere in memory far away from the code. In the program, START calls FOO. FOO calls BAR (3 times). BAR calls VMBW. VMBW calls SETVA. START -> FOO -> BAR -> VMBW -> SETVA Each of these "pushes" R11 on the stack, then "pops" it back to R11 for its return. (remember RT just means B *R11) Even START is pushing the R11 given to it. DEF START VDPWD EQU >8C00 VDPWA EQU >8C02 VDPRD EQU >8800 VDPSTA EQU >8802 * BES equates STACK to the address after 8*2 bytes. Opposite of BSS. STACK BES 8*2 up to 8 levels deep * initialize stack pointer START LI R10,STACK DECT R10 save given R11 on stack. it returns back to E/A MOV R11,*R10 * call something BL @FOO BL @WAIT * exit program MOV *R10+,R11 RT FOO DECT R10 save R11 on stack MOV R11,*R10 * call BAR LI R0,34 BL @BAR LI R0,144 BL @BAR LI R0,254 BL @BAR * return from FOO MOV *R10+,R11 RT BAR DECT R10 save R11 on stack MOV R11,*R10 LI R1,HELLO LI R2,HELLO# BL @VMBW * return from BAR MOV *R10+,R11 RT * the usual multiple byte write * R0 vdp address * R1 data address * R2 length VMBW DECT R10 MOV R11,*R10 ORI R0,>4000 BL @SETVA VMBW1 MOVB *R1+,@VDPWD DEC R2 JNE VMBW1 * return from VMBW MOV *R10+,R11 RT * single byte R1, multiple times * R0 vdp address * R1 byte to fill with * R2 length VSBMW DECT R10 MOV R11,*R10 ORI R0,>4000 BL @SETVA VSBMW1 MOVB R1,@VDPWD DEC R2 JNE VSBMW1 * return MOV *R10+,R11 RT * SETVA won't be calling any subroutines so it doesn't save R11 on stack SETVA SWPB R0 MOVB R0,@VDPWA SWPB R0 MOVB R0,@VDPWA RT * wait pushes and pops R11 just to make a point WAIT DECT R10 MOV R11,*R10 SETO R0 big number DEC R0 JNE $-2 i like no labels MOV *R10+,R11 RT HELLO TEXT 'HELLO' HELLO# EQU $-HELLO EVEN END

For For ATF22LV10? These are a good replacement for PAL and GAL lines. Still new from Mouser at $1.45. But they are a dead end. For one thing, just 10 bits of memory tied to the outputs. The ATF750 and ATF1500 offer more (hidden flip flops), but they aren't programmable in the TL866. I think my next step is ice40lp384-SG32 .. it's a tiny FPGA for $1.31. Gives you 21 IOs. Only downside is two degrees harder to solder on. Needs an external EEPROM. But Lattice has been very good to me in a lot of ways. Somehow I overlooked this little baby member of the family. I'm obsessed with minimizing costs as a design goal.

I verified that my ATF22LV10C works as expected, using WinCUPL and the XGecu Pro (aka TL866II+). I used XGecu ver 8.51. Firmware is 04.2.105. ATF22LV10C-10JU were new from Mouser. ($1.45) This $10 adaptor was helpful in verification.

I've verified that ATF22V10s (combinatorial logic) work as expected when programmed in the cheap XGEcu (aka TL866-II). I spent $10 making this adaptor , just what I needed for testing.

Hackerspace work night report: We tried out Zoom at the Hackerspace. Amanda installed the Zoom app on a Galaxy 10 phone. That's our camera/mic. Using wifi and DC power. The picture was good in the classroom lighting. Sound was ok. I think I can scrounge up a Bluetooth headset. There will be a tripod for the camera. With Zoom, you can do screen sharing, or yield the sharing privilege to others. To join in with Zoom (in August!), use the meeting ID https://zoom.us/j/7707370625 The projector in the classroom is history. There is a projector in the lounge, but it's set up for playing video games from the couch. The classroom has a 60" LCD with all the inputs (RF,VGA,HDMI,Composite) and another 37" LCD. There are two huge whiteboards on one wall. Danny was doing air conditioning maintenance last night. So it should be running at tip top. We also have big-ass fans (not actually those ones) A couple Hackerspace members expressed interest in attending.

Me too on the waitlist for 1. I'm not in a hurry. I'm currently working on side port and cartridge port. No immediate plans for Pbox.

Yay! It will be most like Chi Friday.

Welcome bcombee! There will be lots to see. We'll be happy to share the knowledge of whatever aspect of 4A-ness you want. Feel free to bring your system to work with, there will be plenty of space in the classroom. acadiel and OLD CS1 were at VCFSW too.

Hello, I'm attempting to use the ATF22LV10C-JU with the new model XGPro programmer (formerly MiniPro, TL866-II). What I've tried: I have a PLCC-28 to DIP28 adaptor, and program it as DIP28. The programmer reports success at each step. However, I've received my PCB, begun board bringup, and I'm not getting anything out of the PLD. JED file is from WinCUPL, where the design simulates successfully. I verified VCC=3.3, and CLK in at 6 MHz. All inputs are stepped down to 3.3V by 74LVC245A buffers, and much slower than 3 Mhz. I have only combinatorial equations, no registers, but I put a 6 Mhz on the CLK pin anyway. So far, all I see is two Output pins at 3.3, when they should be varying. I didn't add enough test points to my board, so I've ordered a custom PCB breakout to test the ATF22LV10 in isolation. Others reported the ATF22V10 wasn't easy to program. My XGPro with the latest firmware reports success, is there any reason to be skeptical of this?

It's almost the 3rd Wednesday work night at ATX Hackerspace, Jul 16. I'll be there doing some 99/4ATX business. Like trying out video conferencing in the classroom, with YouTube and Zoom. In case you want to test being on the Zoom channel, here's the URL: Zoom meeting URL: https://zoom.us/j/7707370625 I'm not sure if you have to sign in on Zoom. Anyway its free. YouTube test channel to follow. Anybody is welcome to jump in Wednesday night after 7:30 Central. Thanks for all the input on which videoconference.

I'm in the 24hr wait period for YouTube. I like Zoom and it has chat and screen sharing. It turns out it only costs $15 for a one month plan. The free one cuts off every 40 minutes. My new Zoom meeting URL: https://zoom.us/j/7707370625

Has anybody made (for sale) a test point adaptor for Pbox card, sidecar, or cartridge port? I've seen pictures of a Pbox card riser with a card on top. Ideally there would be a row of pin headers to attach probes to, so that you can watch the bus without adding test points for all the common signals to hardware under development. I drew up a PCB for the cartridge port, 3" long and 2" wide (just a bit wider than the 2x18 card edge.) It takes a 2x18 header for test leads, and a pass-thru 4A cartridge port (either pointing up, or reuse the right angle adaptor.) I'm kind of balking at the fab cost which is the same as a regular cartridge run. Ideas to make it more useful would be to squeeze in some pads for GROM, EPROM, bank latch, and maybe even a tiny prototype area. So it becomes both a cartridge debugger AND an experimenter board. Test points board. 50mm wide x 75 mm long. ||||||||||||||| -|||||||||||||||- ||||||||||||||||| ||||||||||||||||| ||||||||||||||||| ||||||||||||||||| ||||||||||||||||| |***************| test point |***************| headers ||||||||||||||||| ||||||||||||||||| |@@@@@@@@@@@@@@@| cartridge port \@@@@@@@@@@@@@@@/ pass-thru Experimenter add-on board. 50mm wide x 100mm long. ||||||||||||||| -|||||||||||||||- | | |LLLLLL GGGGGG | LATCH and GROM socket |LLLLLL GGGGGG | | | |RRRRRRRRR | EPROM socket |RRRRRRRRR | |RRRRRRRRR | | | |***************| breakout all pins |***************| in rational order |...............| protoboard |...............| |...............| . . |...............| |...............| |...............| Two boards can be panelized in a 100x100mm job ($16.95 at dirtypcbs.com), two for the price of one. Here's another inspiration for an experimenter board: https://store.digilentinc.com/breadboard-expansion-with-mxp-connectors-for-ni-myrio/

I will try YouTube. There's no two-way there, no chat room right?