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About rpineau

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  1. I'm in USA and I might be able to do that mod for you. contact me directly. Rodolphe
  2. This is the so called blitter patch. It's usually on a small board soldered to the cpu, this one was done with the chop (flip-flop) on top of another one then wired to the cpu. Rodolphe
  3. so the connector above are not easy to find so we've also ordered some APM G832MB011206222HR and G832MB111205222HR receptacle and plugs and we're going to check the mechanical strength (these are also 120 pins so it's a direct mapping from one to the other for me in Eagle). We'll keep you posted on our progress. Rodolphe
  4. I'm going to take a look at the Hirose FX2-120P-1.27SV and FX2-120S-1.27SV receptacle and connector. I'll order a set and will take some measurements. This doesn't mean we'll be able to put any and all cards in the STE, but if we put the connector as far as possible toward the back we can may be have "short" cards that fits. Rodolphe
  5. these are not easy to solder and we still need a lot of connections ( 96 signals so far and we're planning on adding another 8 for card IRQ ) which is why we chose a simple pin header connector with 2x 2 rows (56 + 40 which will latter be 56 + 48). If you have a good example of something that can allow board stacking (don't forget that we have the 68020 on a socket and the 2 PLCC sockets for the TOS) and leave enough space for the component between the board we could look into it. This doesn't solve the fact that there is little to no space in the STE to stack boards. Rodolphe
  6. Hi everyone. We now have some very stable working code and we've been testing this for the last 2 weeks and it's very stable. The same code run on the STE and MegaSTE which is a good thing. We're now facing the mechanical issue of fitting the card in a STE and closing it.. as we have an expansion port for cards. On the MegaSTE this is not an issue as there is a lot of space above the card. On STE .. with our current connector (see image) we can't even close the machine, let alone put a card in it on top of the main cpu board. So the question is ... what do people want for a STE (and STF which has even less space) ? Is a simple 32MHz 68020 card with no expansion port enough (so no additional RAM, Video, network, .....) ? Adding some SRAM in 32 bit mode is an option but is fairly costly and will require us to rework the board to be able to fit the component (probably a max of 8MB with Cypress CY62167ELL-45ZXI SRAM as they are 5V devices) Or do you guys want the card with an expansion port .. which mean re-casing the STE ? (and how would you do that .. PC tower ? ) but will allow for better expansion board (DRAM, ...) so let us know. Picture : http://www.rti-zone.org/images/2017-02-05-3050.png
  7. On the MegaSTE, you probably blew the keyboard connector fuse. So you probably need to first change that (I had to do it on mine for other reason). I never used an Eiffel interface so I can't advise on that part. Regards, Rodolphe
  8. So I have been fighting a problem for a few weeks now. One of the GB622 test was not working at all, total screen corruption, super slow. The test is "VDI Text Effects". If I disable the blitter, the test works. My MegaSTE has a combo GSTMCU with the integrated blitter. Juliusz has an external blitter and didn't have any issue. Everything else was working and the machine was very stable (bus at 8MHz, no 16KB cache). Yesterday I finally got it working. I had to delay the CPU /AS by one 32MHz cycle before using this variable in our general strobe sync VHDL process. Everything works now and the machine is very stable still. My guess is that combo chip react faster to /AS then the external Blitter and some data was not quite stable on the bus when the integrated blitter was reading it. With this solve we're now good to move on the 32 bit TOS (I already have the 2 eprom on my board). The current result in GB622 : Display : 151% CPU : 467% Average : 224% As I'll be travelling and out of the country until the end of the month I don't know how much progress we'll make on this but at least we have a stable working base. Rodolphe
  9. You can find the schematics there : http://dev-docs.atariforge.org
  10. Last time I had a chat with them it ended up with them telling me to shove it where the sun doesn't shine and that they will never make any effort to make it Atari compatible ... so even though they seem to have changed their mind, I'm not to sure I want to talk to these guys again. Rodolphe
  11. Did they add the VMA/VPA/E signals support ? If not, it's not going to work on a ST (they are not used on Amiga).
  12. We've made huge progress. The STE board has been tested in a MegaSTE and is now working at full 32MHz (no clock switching) and was tested up to 35MHz. We tried 40MHz but got a black screen. So for now we're continuing with 32MHz. We still have a few issues to fix, mostly slow rising time on tri-state pins so we need to change some pull-up from 4.7K to 1K to see if it helps. This is needed to allow us to use the expansion bus and allow a bus master on it. The new code is fully written in VHDL using the Xilinx tools and gives us a lot more options and is easier to modify/maintain. We still need to do a few things: - 32 bits TOS access at 32MHz (will probably need 1 or 2 wait states with 55ns ROM). - Blitter TOS access when the blitter is bus master (need to multiplex 32 bits to 2x 16b its) - Fix pull-up to allow bus master on the expansion bus We have a preliminary doc for the expansion bus (eagle file and pinout doc available upon request). Rodolphe
  13. http://www.exxoshost.co.uk/atari/last/V1STE/index.htm
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