System Clock Doubling
For increased processor throughput, the system clock output from TED doubles
frequency from 894KHz (NTSC) to 1.788KHz (NTSC), during non−display times.
The horizontal position register counts 456 dots, 0 to 455. During counts of
400−344, wile in raster lines 0 to 204, the TED device outputs single clock.
During this time TED is doing processor handshaking (counts 400−432),
character fetches (counts 432−304), and dynamic RAM refresh (counts 304−344).
Outside of this horizontal window TED outputs double clock (1.788KHz). During
raster lines 205−261 for NTSC (205−311 for PAL), TED outputs double clock at
all times except horizontal counts 304−344 which are single clock to allow for
dynamic RAM refresh. If the blanking bit (Register #6) is cleared, the active
display is cleared, the screen is filled with border color, and double clock
is enabled at all times except refresh.