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Blog Comments posted by Thomas Jentzsch
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Glenn tells me that sound data only needs 4 bits, so Chimera could shovel sound data to the VCS using TIA reads.The volume register only needs the 4 LSB, so digitized music would be possible that way. The are a few other TIA registers which might still be used that way (e.g. enabling missiles and the ball).
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Hmm... so you're suggesting
LDA GRP0 ; read from linked queue
STA GRP0 ; write to TIA
The idea was to do this in one instruction, e.g.
INC GRP0 ; read from linked queue, (modify), write to TIA
which would save one more cycle. But since it doesn't work anyway...
I wouldn't say stupid, just not familiar with the hardware side of things.Very diplomatic.

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Although you could have a queue drive the data bus when it sees the appropriate TIA address, the 6502 would also be driving the bus. i.e. on STA GRP0, both the 6502 and Chimera would be trying to change the data bus. For LDA GRP0 the 6502 wouldn't drive the bus, but the TIA wouldn't latch the data.
And if I do both? First I do a load operation (Chimera would drive the bus) and then a store. No?
Or couldn't we use some of the repeated TIA registers instead?
Sorry, if I sound stupid.

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I dont think this is possible, but I really dont know anything about VCS assembly. If I am understanding you, you want a move instruction that can have any effective address for the source and the destination. With 6502 menmoics like LDA, LDX, and LDY, I dont think an instruction exists for that.
Right, such an instruction doesn't exist.
But couldn't additional hardware help out here? E.g. when I write to a TIA register, put the data from a queue on the adressbus?
Or, if that's not possible, use the TIA adresses also as queue read registers and then do a read-modifiy-write instruction (e.g. INC), which reads from the queue, modifies (AFAIK there are no read-write instructions without modify) and then writes the result to the TIA register?
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Added via "includes.zip"
Thanks!
Now define "gapless". Do you want to get rid of the vertical stripes?
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I must admit I have no idea about hardware, but after looking at the DPC code in Pitfall II and reading supercat's suggestions, I wonder if something I would describe as "directly linking a queue to a hardware register" is possible.
E.g. instead of...
lda QUEUE0 sta GRP0 lda QUEUE1 sta GRP1
...when you directly link a queue to GRP0 and another one to GRP1, so that any write (or read?) access to those registers triggers the queue and you can do just this:
sta GRP0; reads from QUEUE0 sta GRP1; reads from QUEUE1
Or maybe the other way around:
lda QUEUE0; writes to GRP0 lda QUEUE1; writes to GRP1
As I said above, I have no idea if it is possible. But if something like this is possible (even when having to use a 5 cycle r-m-w instruction), we would gain a lot of additional CPU time inside the kernel.
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I really like the main font on this one from Joel Peguero though. Very clean, fits the design nicely, and really stands out from everything else.
The font is nice, but IMO it doesn't fit to the theme. Some old fashioned looking font matches it much better (IMO!).
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The chimera.h file and chimera_font.asm are missing in the archive.
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This one would get my vote.
(again!)Or maybe one of Galaxy Warrior...

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I look forward to reading your reviews.
Same here. I especially like that Nathan's reviews are not only well written and fair, but also honest.
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Did you already get some feedback from Al wether he's interested? We could adopt Star Fire to this, so everybody would have to pay less for it!

Sounds like I good idea, depending on how much cheaper the cart would get. There are quite some 8K games in the store.
BTW: Is Crazy Balloon really just 4K? Or why does it cost more than other 4K games?
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it did look much better when the horizontal and vertical movement was synchronized.

Yup, I learned the same when doing Thrust. I could have done the vertical scrolling smoothly, but it just didn't look good.
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Very clever!
I especially like the idea of fast in-kernel bankswitching.
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Loop schmoop, the unrolled version is so short that I'd use that anyway.

Nah! Unrolling is for wimps!

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I don't think TJs loop will work BTW, as it never updates A.Yup, missed one lda.
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Manuel, you are right.
Even some simple bubble sort should be way more efficient than any peephole optimizations.
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Or, without unrolling:
FindLowestPtSubroutine lda ElevY+6,X ldx #5 stx Temp+1 FindLowestPtLoop cmp ElevY,X bcc NotLowestPt stx Temp+1 NotLowestPt dex bpl FindLowestPtLoop sta Temp
Saves at least 3 cycles/loop (or 6), plus one whole loop.
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Cool!

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After a while your code does get heavily obfuscated, however.
You can bet your life on that.
Still it is always somewhat rewarding when you find another byte in your already heavily optimized, obfuscated code.

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I like it! It's definitely an improvement.

Especially because the huge contrast between the hires dragon and the lowres playfield has been minimized now.
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IMO the base is looking much better now.

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Very nice and pretty addicting. I hope you will also make a 1k version of it.
Any chances for adding the stairs? IMO the contrast should be increase (e.g. between the floors).
And why are the elevators striped?
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Definitely an improvement in gameplay.
But the flicker really hurts.

BTW: The right one also seems to flicker between white and yellow.
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I really like it. Very nice, natural looking comic style.
Except maybe for the base, IMO it looks a bit too perfect and clean. Maybe a mixture of concave and convex circles, with different height would help.

Atari 2600 "DOS"
in mos6507's Blog
A blog by mos6507
Posted
Any chance to disable the read functionality (e.g. inside the kernel)?
Or another (most likely also impossible) idea: Switch A12 during a RMW-instruction. Then e.g. INC $1000+GRP0 would read from $101b and write to $1b (=GRP0).
BTW: Please tell me when to stop.