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FALCOR4

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Posts posted by FALCOR4

  1. Posted

    5 hours ago, HOME AUTOMATION said:

    So, in other words, each register will continue to show precisely which page it's block is set to.

    Are you saying the LSByte will not be displayed at all? If so what would be the delineator between segments?

    :ponder:

     

    Correct.  The SAMS circuitry is simplistic, and I don't mean to say that is a bad thing.  It's not, it just means that not all possible functionality is implemented which would require more ICs and board space.  It will put the same page number (repeats) for a 1M segment in both the LSByte and the MSByte from the LS612 when you do a register read (>00 to >FF).  The LSByte that is latched (which gives you banks beyond the first 1M) is not connected in such a way that it can be read back.  So, you'll only be able to see page numbers for any one particular 1M bank, you won't be able to read back what bank you're in which would be in the LSByte if it were implemented.  If needed, the software will just have to keep track of banks.

     

    I just put together another 4M board and am doing a burn in right now that should run through the night.  When it's done, I'll play with it to verify that what I'm telling you is true or not.  I'll report back with what I find.

    • Thanks 1

  2. Posted

    On 9/9/2020 at 6:56 AM, Omega-TI said:

     

     

    It's taken a while to confirm, since the computer has to be cold every time I test, but it appears isolated to the FinalGROM cartridge.  Everything works fine with XB2.7S or the SuperCart.  I dunno if the cartridge is a little "thinner" or if the traces are not making good enough contact until they heat up a little, of if it's some component on the board itself.  Next week when I get some time, the plan is to lay a thin layer of solder on the cartridge traces to build them up "just a tad" in hopes of better initial contact.

     

    Thanks for the feedback!

    What's worked for me is to clean the contacts and use a very thin layer of dielectric grease on the contacts.   But, personally, I wouldn't apply solder to the contacts as that, will over time, oxidize and give you further problems.  Back to the clean and grease........

    • Like 2

  3. Posted

    On 9/10/2020 at 6:10 PM, Lee Stewart said:

     

    On 9/10/2020 at 5:53 PM, HOME AUTOMATION said:

    Au contraire mon frère.:twisted: Yes, you can read SAMS' addressing registers, when CRU >1E00 is set to 1(SBO 0). Even when in TRANSPARENT MODE, they show either their default values, or whatever you have changed them to.8)

     

    Please do not depend on being able to read the SAMS registers in your software!  Yes, you can read back the registers but only in 1M segments, the SAMS greater than 1M boards will not read back anything beyond 1M segments; i.e. if you have a 4M or 8M or 16M SAMS it will not give you any granularity beyond 1M.  Just a caution to those who are writing software.  And, currently there is only a 4M SAMS available but, the possibility for a 16M does exist  and, in my opinion, should be accounted for in software development.  Again, IMHO.

    • Thanks 2

  4. Posted

    1 hour ago, GDMike said:

    Without buying a 4MB card, can the 1MB cards be upgraded as they sit?

    I suppose its possible but you would have to add a couple of components and do some trace hacking.  If the components on your 1M card are in sockets, why not just move them over to a 4M board, add the caps/resistors and new 2Mx8 memory?  It would be a lot easier. 

    • Like 1

  5. Posted

    On 7/11/2020 at 10:13 AM, arcadeshopper said:

    We already have multiple memory standards

    - 32k

    - myarc 128/512k (foundation compatible) (includes 32k)

    - Corcomp 128/512k (useless but ramdisk)

    - SAMS (includes 32k)

    - Rambo (might include 32k)

     

    why not add 3 more? So nobody will have the right one for that new program coming out!

     

    Because if we don't standardize on one, nobody will have the cards.. how many of us have a myarc card?  A rambo?  

     

    SAMS are the only cards being currently built with sufficient supply to put one on all the active TI systems.  Seems a no brainier to standardize on the only available standard.  I know Jim has sold a bunch, and I have sidecars for everybody else who doesn't have a Pbox, Ralph is making his sidecar final grom disk emu ram thingie with some whopping amount of SAMS when it releases..  

     

    SAMS is giving Rasmus and Adam the ability to make the games that we always wanted to see. 

     

    Greg 

     

     

    Greg, as much as I love the idea of adding capability to the SAMS card (DSR, CRU register address tables, etc.) I wholeheartedly concur with you.  Changing how the cards works more or less negates any software work done to date.  IMHO, it should be and remain as THE standard expanded memory card for the TI.  

    • Like 6

  6. Posted

    On 8/18/2020 at 5:05 PM, InsaneMultitasker said:

    Record IO, particularly variable length records with more than one record per sector, can benefit from a shortcut approach.  Time saved will depend on total records read, the number of cards preceding the target device's CRU and the number of device or subroutine entries the DSRLNK needs to search through before it finds the target.  And in the case of DSRs like the Horizon ramdisk ROS, DSRLNK must search  the devices AND subroutines due to how the tables are linked for special operations. 

     

    One method is to save the CRU address and the dsr device/subprogram entry point within the main DSRLNK and then leverage those values elsewhere to turn on the card, BL to the correct address, and perform usual DSRLNK error reporting steps.   If you are using a subprogram call like >14 (direct input file read) you would call the subprogram once with the  standard DSRLNK and then switch to the shortcut version until the operation is complete. 

     

    You can also implement a shortcut as a separate routine or in-line with your IO routine.  To read a file you would open with BLWP @DSRLNK and then for all remaining record IO your loop would include setting the workspace to GPLWS, set any environment addresses like 8356, R12, etc. , execute the call, restore your local WS and read/report the error. 

     

    I suspect that the RAG Assembler captures the DSR address as well.  At least, watching it in action it appears to be doing so.  When I have my HRD set to an address beyond >1100, the only time I see the disk controller card LED flash is when the assembler opens a new source file.  After that, all the action in with the HRD card until another file is needed.

    • Like 1

  7. Posted

    8 minutes ago, jedimatt42 said:

    Nobody willing has hardware or emulation support to fiddle with AMSTEST4.  

     

    The reason my test program is painfully slow, is because AMSTEST4 was insufficient as a test. I have experience with it passing on bad hardware. It is not a proper test program in my opinion. It is only a quick inventory check.

     

    If there is demand for a fast test... well I'm just going to say that is not really a test... if there is desire for a size detection mode just reset the 4A after my test tells you your memory card size... It will have read, written, and read to every page to determine the capacity.

     

    The current interation (1.7) of my test should handle up to the full 16Meg, but I haven't received confirmation from @FALCOR4 who has the only SAMS above 1Meg, as far as I can tell. It is now using the same paging instructions as documented on Thiery's TI-Tech-Pages website, after a discussion with @FALCOR4 - I have not heard if he has tested this version. 

     

     

    My 4M SAMS only has 2M installed right now because of a bad SRAM but, 1.7 found it, ID'd it as 2M and seems to have tested it successfully.  I've also done some hack code testing on my board and the 2M seems to be good.  I will tell you (and I mentioned it to you during one of our conversations, @Jetimatt42), there is a very nefarious possible error in the SRAMs that I don't believe every test program will find.  I speculate that it has something to do with the internal addressing architecture of the SRAM in the way it addresses rows and columns of bit cells.

    • Like 1
    • Thanks 1

  8. Posted

    2 hours ago, Ed in SoDak said:

    Those numbers are so small they must refer to an empty PEB. Just the old-school full-height SSSD floppy drive eats more than that. Add up to 8 cards, some of which might be RAM, SAMS with a hungry Geneve, possible TIPI, triple tech with speech in the PEB, etc.

     

    Could look up the regulator chips to find their max ratings. Plenty of PC-style power supplies are rated at 35 to 50 Watts, which might relate to a 4- or 5-Amp transformer. You'll see plenty higher ratings yet for power users with a big tower gaming system.

     

    Meanwhile, the spec plate on the back of my PEB states only a 1.25 amp draw from the AC line, which seems a bit anemic and probably explains why it's hard to reliably operate dual half-height "low power" floppy drives from it.

    -Ed

    Very good point!  So, you would need to include the +5v and +12v regulator draw as part of the calculation.  I totally missed that, thanks @Ed in SoDak!

  9. Posted

    41 minutes ago, FALCOR4 said:

    Mine: 120VAC input.  Center tap (blue/wt) to Yellow = 18.6VAC.  Center tap (blue/wt) to Blue = 10.86VAC.  Don't know the current rating for those outputs, however.

    I found this in the PEB theory of operation and technical training manual:

     

    2.2 POWER ALLOCATION ASSUMPTIONS
    The following is a guide for maximum load current a PCB should present to the PEU.
    * 250 ma on the +15V unregulated bus.
    * 500 ma on the +8V unregulated bus.
    * 30 ma on the -15V unregulated bus.

     

    So maybe times eight on each of those voltage rails plus some additional comfort overhead would be a good gouge on current requirements?

  10. Posted

    3 hours ago, Dutchboy said:

    Couldn't I jut replace the transformer on the PEB rather than the whole PSU? Does anyone know what the output on the transformer is going into the board? I have not seen that listed on the schematic that I was using.

    Mine: 120VAC input.  Center tap (blue/wt) to Yellow = 18.6VAC.  Center tap (blue/wt) to Blue = 10.86VAC.  Don't know the current rating for those outputs, however.

  13. Posted

    16 minutes ago, RXB said:

    RXB 2001 to RXB 2015 was just writing a Byte with GPL it left the other byte free.

    So not much of a problem to change it to a word instead of a byte.

     

    Does make it more easy to number pages from 0 to 1024 Decimal or >00 to >0400 Hex

    But you get the added feature in RXB 2020 to be able to change any 4K page in the 32K now.

     

    On the numbering convention, I don't know; maybe leave that to the community that is writing software for SAMS (hey guys, pick one!)?  I know that sounds like a cop out.  Maybe it depends on which language you're using for the application you're writing?.  Also, slight edit if I may (don't hate me); 0 to 1023d and >0000 to >03FF.  To be technically correct. 

     

    I like the added feature for the 4K pages in all the 32K space, that was a great change that offers more flexibility!  The card can do it, might as well be able to use it!

    • Like 2
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  14. Posted

    53 minutes ago, FALCOR4 said:

    Exactly, you got it.  Just another way to slice the pie.  And, BTW, you can do the same for the 1M card; write a word instead of a byte.  That way the same code can be used for both versions of the SAMS.

    I re-read your question so, to be clear, you can't write-a-byte then write-a-byte.  You have to write it as a single word; MOV not MOVB, MOVB.  I can go into more detail as to the "why" but I don't think most folks would be interested.  I'm getting off course for this thread, too.  I'd be happy to talk to you some more about it if its helpful, PM?

  15. Posted

    6 minutes ago, RXB said:

    Little confused Hex only handles 256 values in a single byte and 392 it a word.

    Currently I write a single byte to change a page >00 to >FF pages at say >4004 for memory area space >2000 

    this only works for 1 Meg of memory.

    Are you writing 2 bytes to >4004 for memory area space >2000 thus this second byte can be >00 to >03 for a 4 Meg SAMS?

     

    So are you putting a word >8801 in >4004 thus this would be page 136 in Decimal or >88 in Hex and >01 in second byte that selects 1 meg pages (>00 to >03)?

    Exactly, you got it.  Just another way to slice the pie.  And, BTW, you can do the same for the 1M card; write a word instead of a byte.  That way the same code can be used for both versions of the SAMS.

    • Like 3
    • Thanks 1

  16. Posted

    1 hour ago, RXB said:

    Someone send me the code you are using to access and run the card please

    I can include SAMS 4M support in RXB 2020 when released.

     

    Currently dead in water as my PC CPU (AMD 3900X) is dead and in Florida under repair.

    Rich, I'm using some hack code just to check the card's SRAM; fill each page with the page number and reading it all back through the MG Explorer. (avoiding the space where Explorer resides).  Super simple.  But, one way to page a 4M SAMS-->  Put the page number in a word, SWAP the bytes in the word, write the word out to the SAMS register for the 4k block of the 32K memory space you're interested in presenting the page.  So, to page in page 392 (>0188) into the >2000 memory space: enable the SAMS load register bit, load the page number into a word (>0188), swap it (>8801) and write it out to >4004.

    • Like 1

  17. Posted

    On 6/3/2020 at 5:04 PM, FALCOR4 said:

    Thanks!  Pretty nifty program!  I used it on a 1M board but I'm still waiting on a few parts for the 4M board.  I will report back to you once I get a chance to use it on the 4M.

    Its been a while but I'm happy to say that my SAMS 4M card is up and running (thank you Ksarul!).  I had a bad DALLAS SRAM that was giving me intermittent fits so I switched to ZEROPOWER SRAM and now I'm showing the entire 4M and, it seems to be stable so far.  I've paged and written to all 1024 pages several times successfully; I'll continue to work with it and use it as my main memory expansion card.

    • Like 5
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  18. Posted

    On 8/7/2020 at 12:40 PM, FALCOR4 said:

    A software developers guide for the HRD4000B.  Special thanks to Ksarul, InsaneMultitasker, Retroclouds and BeeryMiller for their inputs.

     

     

    Software Developers Guide to the Horizon HDR4000B_ver 1-0.pdf 2.39 MB · 26 downloads

    Well, tiddlywinks, there's a couple of nit things I didn't catch in the document.  Most notably, change the two references from "M32" in figure 5 to "U9".  The other nits are cosmetic.

     

    For all of you who downloaded a copy of the guide, if you find something that you would like better explained or any errors please PM me and let me know.  Sometime down the road I'll send out corrections/changes in an errata sheet or subsequent version depending how much change is needed.  Thanks everyone for your support.

    • Like 5

  20. Posted

    14 hours ago, Ksarul said:

    We have a posted set of the console GROMs that @FALCOR4had in his documents collection, but I think we are still missing a few pages ofit at random points (also missing from his set). Someone else had some of the missing bits, but again, I think we may still be missing a few pages to complete the set. On the console ROMs, I don't think we've got a good original source code set of those yet. Heiner Martin did his own commented disassembly of the whole console in his book, TI Intern, but the comments were his own, and nowhere near as complete (or accurate) as what is in the TI originals.

     

    @urbite and I reconstructed an editable copy of the original source for Parsec a while back, and I did a similar exercise for the source code included with the BASIC Support Module documentation.

    I managed to get the missing GROM pages thanks to Regulus.  We have a "retype" of the original ROM listing but I've not seen the original listing it came from; would love to have a copy though.

     

     

  24. Posted

    7 hours ago, retroclouds said:

     

    So where did you get the DALLAS SRAM’s ? Are they still available?

     

     

     

     

    Hmmm, IIRC, I got them off of Ebay quite a while ago.  They're still listed there as coming from China and are a bit pricey.  Someone might have a better source for them?

  25. Posted

    9 hours ago, retroclouds said:

    Here’s the thread. There is a cartridge image and an updated version for loading from disk (check all posts in thread):

     

     

    If you want to use the MG Explorer on old iron to help troubleshoot XB code let me know.  I will post a version that loads into the lower part of upper memory specifically for use with XB.  Also, I would selfishly recommend the Paisley version of the MG Explorer.  It is a slightly smaller code version that fits into two ROM banks with a loader; adds help screens and a few other additions for GRAM devices and memory mapped devices.  One way you can use it is to load it into memory then set a breakpoint in your code to branch to >A000 or, launch it and then point to your code in memory to start step-by-step execution.

    • Like 4
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