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madness77

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About madness77

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  1. Work in progress... I am waiting for the rest of the components and the first prototypes will be ready.
  2. They look really beautiful. Will STL files be available to the general public like the rest of Your enclosures?
  3. @mytek Thanks a lot for your answer. Test 1 - variant practically identical to my v0.2 approach Unfortunately, I came to the conclusion that the IDE connector and bent signal tape just couldn't fit under the keyboard... But maybe I am wrong. I am afraid of the problem with closing the case. Test 2 - I tried a similar setting, which finally led me to pull out the IDE connector to its current location. The reason was simply lack of space on the PCB to lead tracks (D0-D7 and others) to IDE and U1MB connectors. The solution could be to add about 0.5 (bottom) and 1cm (right) margin around the board. As for the cost: I love OSHPark for its simplicity and approach, but unfortunately their services are not the cheapest. My project was much more than $30 for 3pcs. Well... try JLCPCB I agree that a long arm can be a problem. But the precision pins are pretty tight in the sockets. (checking Sophia or Stereo modules) To be sure, you can also put a plastic distance under the arm. An unquestionable advantage of such a setting is that there is no need to twist the signal tape to the CF card connector several times. Now it can be straight and as short as possible. You could also consider using angle connectors and connect the CF socket directly, as in Amiga 600 But I think that the mutation of the Test 2 variant may still be worth considering, especially in XE. Thanks again. PM
  4. OKAY. Third approach to PCB. Previous board did not fit due to U29 chip height. Connections checked twice. In the previous diagram there is an error in CPU pinout. I did not find any more problems. But more eyes will look, the better. Here is the version for Atari 800XL. I don't think it will interfere with any other extension (e.g. VBXE). In addition, I've derived signals for U1MB. Thanks to that you will not need to solder cables to CPU or vias. I think the project is ready to send to the PCB factory and make the first prototype. BOM is identical to XEL-CF (+ DIL 40 precision socket, of course). If someone wants a bare board and try it, please write a private message. The project will be on my github soon. Please tell me what you think.
  5. @flashjazzcat @mytek Thanks a lot, guys, for the answers! I decided to face the subject, so I made a quick sketch at KiCad. This is the effect: I measured the board, it should fit 800XL. Of course, we can quickly replace the footprints of the elements with SMDs. The bars in the CPU socket can be cut the same way as in the MixSID project: All right, I know that the circuit diagram still looks a little shitty, but as I wrote, it's just a quick sketch based on the Mytek schematic. I'm asking you to check it out. If all connections are correct, I will start to route the paths. Then, of course, I will also make all the source files available on the github. Any constructive criticism is welcome
  6. @mytekSo it looks like all you have to do is replace the MPBI connector with a CPU socket and you're done? About 15 minutes of work at KiCad
  7. @mytekHas anyone tried to install XEL-CF in a regular Atari XL/XE by retrieving all the necessary signals straight from the motherboard (or IC's pins)? Does @flashjazzcat BIOS for regular U1MB support CF cards?
  8. @flashjazzcat If the firmware is open sorce, is it possible to add new features? - SIDE loader compatibility mode - ATR support (partial R/W) if you have a U1MB - autostart from a specific file - remembering the last position in the folder after the restart - file search Is Altera MAX 10 powerful enough to handle it?
  9. Hi, I can't program Altera, I don't know if it's a matter of cheap USB Blaster programmer clone or assembly of the cartridge itself: The programmer is visible in the system: $ dmesg -r <6>[14848.078157] usb 1-1.3: new full-speed USB device number 23 using ehci-pci <6>[14848.186946] usb 1-1.3: New USB device found, idVendor=09fb, idProduct=6001 <6>[14848.186949] usb 1-1.3: New USB device strings: Mfr=1, Product=2, SerialNumber=3 <6>[14848.186950] usb 1-1.3: Product: USB-Blaster(Altera) <6>[14848.186951] usb 1-1.3: Manufacturer: Altera <6>[14848.186952] usb 1-1.3: SerialNumber: 8D7B43845056 Chip is detected: $ ./jtagconfig -d 1) USB-Blaster(Altera) [1-1.3] 031820DD 10M08SA(.|ES)/10M08SC (IR=10) Captured DR after reset = (031820DD) [32] Captured IR after reset = (151) [10] Captured Bypass after reset = (0) [1] Captured Bypass chain = (0) [1] JTAG clock speed 6 MHz $ ./bin/quartus_pgm --auto Info: ******************************************************************* Info: Running Quartus Prime Programmer Info: Version 18.1.0 Build 625 09/12/2018 SJ Standard Edition Info: Copyright (C) 2018 Intel Corporation. All rights reserved. [.....] Info: Processing started: Tue Jun 4 00:26:08 2019 Info: Command: quartus_pgm --auto Info (213045): Using programming cable "USB-Blaster(Altera) [1-1.3]" 1) USB-Blaster(Altera) [1-1.3] 031820DD 10M08SA(.|ES)/10M08SC Info: Quartus Prime Programmer was successful. 0 errors, 0 warnings Info: Peak virtual memory: 425 megabytes Info: Processing ended: Tue Jun 4 00:26:08 2019 Info: Elapsed time: 00:00:00 Info: Total CPU time (on all processors): 00:00:00 But the programming process always ends with the following error: $./bin/quartus_pgm -m jtag -o "p;/home/johny/UltimateCart/Programming Files/New Firmware (XEX loading)/10M08SAE144C8G.pof" Info: ******************************************************************* Info: Running Quartus Prime Programmer Info: Version 18.1.0 Build 625 09/12/2018 SJ Standard Edition [....] Info: Processing started: Tue Jun 4 00:30:10 2019 Info: Command: quartus_pgm -m jtag -o "p;/home/johny/UltimateCart/Programming Files/New Firmware (XEX loading)/10M08SAE144C8G.pof" Info (213045): Using programming cable "USB-Blaster(Altera) [1-1.3]" Info (213011): Using programming file /home/johny/UltimateCart/Programming Files/New Firmware (XEX loading)/10M08SAE144C8G.pof with checksum 0x01D3FF3A for device [email protected] Info (209060): Started Programmer operation at Tue Jun 4 00:30:10 2019 Info (209017): Device 1 contains JTAG ID code 0x031820DD Info (209060): Started Programmer operation at Tue Jun 4 00:30:10 2019 Info (209016): Configuring device index 1 Info (209017): Device 1 contains JTAG ID code 0x031820DD Info (209007): Configuration succeeded -- 1 device(s) configured Info (209011): Successfully performed operation(s) Info (209061): Ended Programmer operation at Tue Jun 4 00:30:13 2019 Error (209012): Operation failed Info (209061): Ended Programmer operation at Tue Jun 4 00:30:53 2019 Error: Quartus Prime Programmer was unsuccessful. 1 error, 0 warnings Error: Peak virtual memory: 449 megabytes Error: Processing ended: Tue Jun 4 00:30:53 2019 Error: Elapsed time: 00:00:43 Error: Total CPU time (on all processors): 00:00:00 Any suggestions?
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