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ijor last won the day on July 31 2011

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About ijor

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  1. Hi Zarxx, Nobody can complain for such amazing work, thank you ... But, IMHO, images taken from non original disks should be cleared, individually, labelled as such. Again, not a complain
  2. Hi Hias, It was actually me who researched synchronous mode extensively years ago (but true, inspired by Candle's idea). We even talked about it in the following thread, you forgot! : You can easily reach speeds, at least, twice faster than async divisor zero. You probably might need to disable NMI, and depending how fast you go, you might need no more than a very few ANTIC DMA cycles. Error checking is not a big problem. Maximum possible bitrate is slightly less than PHI2/3 at approx 570 kHz.
  3. Of course not, so what? No official Atari OS supports divisor zero either, or even high speed for that matter. That didn't stop Happy or USD to implement warp/high speed then. Why that should stop us now?
  4. Not trying to be picky, but you can go even faster with synchronous mode. It would be interesting if some of the more advanced SIO2XX devices would support synchronous mode.
  5. Allan, sorry to insist, but what happened to Atarimania? It's not updated anymore?
  6. I don't think the 1450XLD had, even remotely, the capability to read a flippy disk backwards (without flipping). That would require very expensive hardware at the time, and would have been very slow. I think this "small" mode wasn't mean to be compatible with 810 flippies. Just that you could split the sides logically and the computer would see them as two separate drives. But that back side would not be flippy and you wouldn't be able to read it on an 810 drive.
  7. I posted a simulation waveform illustrating the pokey delayed serial input capture/sampling:
  8. As Hias commented in other thread, Pokey doesn't capture the serial input at the optimum cycle. Ideally serial data should be captured at the middle of the bit cell. This allows for the maximum possible deviation between the rate transmitted by the peripheral and Pokey internal one. But Pokey instead performs the capture between 4.5 and 5 cycles later, depending on the phase of the serial input and the internal clock. This is not a big problem for the normal bit rates, but it is critical for the very high ones such as when using divisor 0. Here it is a simulation waveform illustrating the worst case issue with divisor zero. The simulation is based on the original Pokey logic taken from my reverse engineered schematics: The signals are the main clock, the external serial input in red, the internal synchronized serial input in yellow, and the first bit of the internal shift register in light blue. The counter at the top is a virtual counter that counts cycles since the internal serial input edge (this counter doesn't exist at the hardware). The first vertical cursor, at the start of cycle #7, marks the center of the bit cell and is the ideal capture point. The period with divisor zero is 14 cycles. The second cursor at the start of cycle 12 shows when the bit is actually latched at the shift register, five cycles after the center of the cell. This five cycles, or four and a half, delay is constant regardless the divisor.
  9. Thanks, and sorry once again ... where is the "ashamed" emoji?
  10. As somebody that should verify those dump, and I didn't, I certainly can't complain. But everybody should know that those dumps are unverified yet, so may be add a note to archive.org about the state and condition of those dumps?
  11. Yes, of course there was something like that. What I meant is that, as I recall, it wasn't part of the Silencer. And that's why I said that I believe it was used to be bundled with other CSS products. As I remember, it was bundled with the "poor man bad sector creator" (don't remember the actual product name) that worked by slightly moving the disk with an attached tape while writing to the sector.
  12. No. Neither the FDC, neither the drive mechanism will allow it.
  13. The Silencer was the most advanced piece of engineering ever made for the Atari, and perhaps for any computer. It probably took years of research and development ... You receive ... some lubricating grease with full instructions ! Yeah, that's right, believe or not. May be there was something else I don't remember I'm not sure about a modification for writing to flippies. I think CSS used to bundle the Silencer with a couple of other products.
  14. It's not about size but about power (please, no more double meaning jokes ) The current MAX is based on an 8-bit AVR CPU at 16MHz with 32KB flash and 2K RAM (somebody corrects me if I'm wrong). The blue pill has a 32-bit ARM Cortex at 72MHZ with 64KB flash and 20K RAM.
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