candle

here are programming details for melody bus: Melody Interface Specification Melody exists as a series of cartridges for Atari XE/XL Each cartridge has several sound chips with common access interface, and audio input and output for easy daisy-chaining one to the other. For this purpose a passive cartridge expander was built Currently there are 5 Melody cartridges PSG - contains 2 PSG chips TurboSound - contains 2 Yamaha OPN chips, and a single SAA1099 chip OPX - contains Yamaha OPL(2 or 3) chip and Yamaha OPM chip OPN2 - contains 2 Yamaha OPN2 chips and SN76489A chip SID - contains 2 SID chips - either MOS6581 or MOS8580 All registers are located in cartridge space, to minimise memory footprint this is done as follows: Address: 0xD5DF - Melody interface ID/Address register Reads - 0x4D (Ascii “M”) Writes - any value from 0x00 to 0xFF is treated as bus address if device is present on given address it will respond with activating its registers at following addresses: 0xD5D8 - 0xD5DA - Device ID Currently defined: PSG - address 0x50 OPL - address 0x4C OPN - address 0x4E ON2 - address 0x32 OPM - address 0x$D SAA - address 0x53 SN7 - address 0x37 SID - address 0x49 reserved - 0x00 (all devices are off the bus) 0xD5DB - Interface version (4.4bit, binary) (cartridges are 0.8) 0xD5DC - Device Base address (device dependent resolution) 0xD5DE - Device Control bit 0 SCL bit 1 SDA bit 6 Clock source (device dependent) bit 7 Device reset (default 1 - device in reset state) SCL and SDA provides access to SDA and SCL lines of MCP4651 - dual digital potentiometer controlling output volume level for easy sound mixing of multiple devices Due to the simplistic hardware, all I2C communication is done at 6502 side in software this I2C interface is present in Melody bus starting with version 0.8

a little bit of it perhaps SimpleStereo v4 contains SID and PSG, but no OPx chips - I would say melody cartridges are completly diffrent beast, targeted more to a musicans, rather than anyone else it's something done i can, and for my own satisfaction if anyone find it usefull thats even better i just wanted to know if it will be possible and how hard it will be to get it to play something hardest to crack was one of the simpliest one - SN76489 - although it runs at 4MHz bus, it needs 32 cycles of that bus with data stending still to acknowledge it and process, and it had to be automated as 6502 can't stand still waiting for device to finnish write cycle in that regard, connecting of SID running asynchronous clock, but with plain 6502 bus interface was quite simple and worked first time tryed

Just wanted to show the work i did in 2019 - few cartridges with various soundchips, including PSG (AY-3-8910 or YM2149F) as in Atari ST or ZX-Spectrum, OPL2 (YM3812) known from AdLib, OPL3 (YMF262) SoundBlaster Pro, OPM (YM2151) as was planned for Atari 7800XM and used in many arcade machines, OPN (YM2203) known also as TurboSound - a ZX-Spectrum sound card, OPN2 (YM2612) you may know from Sega Genesis, SAA1099 as in Sam Coupe and Creative Sound System, and finally SN76489 found in TI 99/4 and Sega Master System Video turned a bit crammed - sorry for this, anyways - enjoy

this is what i have on a local backup SNES-to-3DO-sch.pdf SNES-to-3DO-prn.pdf SNES-to-3DO-pcb.pdf SNES-to-3DO.hex

here is code i've wrote back then perhaps it will be any good for someone .include "tn2313def.inc" .def zero = r10 .def one = r11 .def two = r12 ;-------------------------------------------------------------------------------; ; Data Segment ; ;-------------------------------------------------------------------------------; .dseg .org SRAM_Start PadA: .byte 2 PadB: .byte 2 Pad3A: .byte 2 Pad3B: .byte 2 ;------------------------------------------------------------------------------- ;------------------------------------------------------------------------------- ; General ;-------------------------------------------------------------------------------; ; Code Segment ; ;-------------------------------------------------------------------------------; .cseg .overlap .org 0 rjmp start .org INT0Addr .macro wait ldi @0,@1 ll: dec @0 brne ll .endmacro start: cli ; Disable Interrupts ldi r16,low(RAMEND) out SPL,r16 rcall MCU_Setup ; Setup ports sbi PORTD,4 main_l1: sbis PIND,3 rjmp main_strobe_low main_strobe_high: sbi PORTD,4 sbi PORTD,0 rcall SNES_Receive rcall SNES23DO sbi PORTD,4 cbi PORTD,0 main_strobe_high_s1: sbic PIND,3 rjmp main_strobe_high_s1 rjmp main_l1 main_strobe_low: rcall TDO_Send sbi PORTD,4 main_strobe_low_s1: sbis PIND,3 rjmp main_strobe_low_s1 rjmp main_strobe_high ;------------------------------------------------------------------------------- SNES23DO: lds r16,PadA ldi zl,Low(Translation*2) ;r30 ldi zh,High(Translation*2) ;r31 clr r20 clr r21 ldi r17,8 SNES23DO_l1: lpm r18,z+ lpm r19,z+ lsl r16 brcs SNES23DO_s1 or r20,r18 or r21,r19 SNES23DO_s1: dec r17 brne SNES23DO_l1 lds r16,PadA+1 ldi r17,8 SNES23DO_l2: lpm r18,z+ lpm r19,z+ lsl r16 brcs SNES23DO_s2 or r20,r18 or r21,r19 SNES23DO_s2: dec r17 brne SNES23DO_l2 sts Pad3A,r21 sts Pad3A+1,r20 ret ;------------------------------------------------------------------------------- ; SNES: YGSSUDLR RBLR---- ; ltpntt ; 3DO: 00DURLAB CPXRL001 ; Yellow (15) -> A ( 9) ; Green (14) -> B ( ; Select (13) -> X ( 5) ; Start (12) -> P ( 6) ; Up (11) -> Up (12) ; Down (10) -> Down (13) ; Left ( 9) -> Left ( 7) ; Right ( -> Right (13) ; Red ( 7) -> C ( 7) ; Blue ( 6) -> P ( 6) ; L ( 5) -> L ( 3) ; R ( 4) -> R ( 4) Translation: .dw 0b0000000100000000 ; Yellow (15) -> A ( 9) .dw 0b0000001000000000 ; Green (14) -> B ( .dw 0b0000000000010000 ; Select (13) -> X ( 5) .dw 0b0000000000100000 ; Start (12) -> P ( 6) .dw 0b0001000000000000 ; Up (11) -> Up (12) .dw 0b0010000000000000 ; Down (10) -> Down (13) .dw 0b0000010000000000 ; Left ( 9) -> Left (10) .dw 0b0000100000000000 ; Right ( -> Right (11) .dw 0b0000000010000000 ; Red ( 7) -> C ( 7) .dw 0b0000000000100000 ; Blue ( 6) -> P ( 6) .dw 0b0000000000001000 ; L ( 5) -> L ( 3) .dw 0b0000000000010000 ; R ( 4) -> R ( 4) .dw 0b0000000000000000 ; - .dw 0b0000000000000000 ; - .dw 0b0000000000000000 ; - .dw 0 ;------------------------------------------------------------------------------- TDO_Send: lds r18,Pad3A lds r19,Pad3A+1 lds r20,PadB lds r21,PadB+1 ldi r16,8 ldi r17,128 ldi r24,16 sbi PORTD,4 TDO_Send_l1: sbic PIND,2 rjmp TDO_Send_l1 ; wait for clock line going high mov r22,r18 and r22,r17 clr r23 cpse r22,zero mov r23,r24 out PORTD,r23 TDO_Send_s1: sbis PIND,2 ; wait for clock line going low rjmp TDO_Send_s1 lsr r17 dec r16 brne TDO_Send_l1 ldi r16,8 ldi r17,128 TDO_Send_l2: sbic PIND,2 rjmp TDO_Send_l2 mov r22,r19 and r22,r17 clr r23 cpse r22,zero mov r23,r24 out PORTD,r23 TDO_Send_s2: sbis PIND,2 rjmp TDO_Send_s2 lsr r17 dec r16 brne TDO_Send_l2 sbi PORTD,4 ret ;------------------------------------------------------------------------------- SNES_Pulse: sbi PORTB,1 wait r22,10 cbi PORTB,1 ret ;------------------------------------------------------------------------------- SNES_Strobe: sbi PORTB,2 wait r22,20 rcall SNES_Pulse wait r22,20 cbi PORTB,2 ret ;------------------------------------------------------------------------------- SNES_Receive: rcall SNES_Strobe clr r18 clr r19 clr r20 clr r21 ldi r16,8 ldi r17,128 SNES_Receive_l1: sbic PINB,3 or r18,r17 sbic PINB,4 or r20,r17 rcall SNES_Pulse lsr r17 dec r16 brne SNES_Receive_l1 ldi r16,8 ldi r17,128 SNES_Receive_l2: cbi PORTB,1 sbic PINB,3 or r19,r17 sbic PINB,4 or r21,r17 rcall SNES_Pulse lsr r17 dec r16 brne SNES_Receive_l2 sts PadA,r18 sts PadA+1,r19 sts PadB,r20 sts PadB+1,r21 ret ;------------------------------------------------------------------------------- Dec_digit: ldi r17,255 Dec_digit_l1: inc r17 subi r16,10 brcc Dec_digit_l1 subi r16,-10 mov zl,r16 mov r16,r17 ldi r17,255 Dec_digit_l2: inc r17 subi r16,10 brcc Dec_digit_l2 subi r16,-10 push r17 mov r17,r16 pop r16 ret Hex_digit: andi r16,0x0f subi r16,-48 cpi r16,58 brlo Hex_digit_ok subi r16,-7 Hex_digit_ok: ret ;------------------------------------------------------------------------------- ; Initial setup of microcontroller MCU_Setup: ldi r16,0b11100110 out DDRB,r16 ; set PORT B as output ldi r16,0b00011001 out PORTD,r16 ldi r16,0b00010001 out DDRD,r16 ; set PORT D as input ldi r16,0b00001000 out PORTD,r16 clr r16 mov zero,r16 inc r16 mov one,r16 inc r16 mov two,r16 ldi r17,255 MCU_Setup_l1: wait r16,255 dec r17 brne MCU_Setup_l1 ldi r16,0xFF sts PadA,r16 sts PadB,r16 ldi r16,0xFF sts PadA+1,r16 sts PadB+1,r16 ret ;------------------------------------------------------------------------------- oh, it's in assembler

can 6502 running at 1.77MHz play what Amiga 1200 running at 14MHz can't? Yes it can, just this is not very practical

1) any machine with 64k or more (that excludes 400, 800 and unmodified 600xl) 2) it does not, and no you can't 3) yes you can 4) depends on software, but technically yes 5) it can, but having 64k machine greatly limits what you can do with SpartaDosX (memlo is too high)

i don't know for sure, but costs should be within pokeymax range - don't quote me on that one though, as i'm just the developer here

i can't know this for sure, but i'm pretty positive that you're first person that actually used that PBI connector on incognito board so far i couldn't be even sure if it works

you can use ps2 keyboard, atari st/tt keyboard, or usb (both wired and wireless) keyboards i'm half tempted to implement ADB keyboard protocol too, but i wanted to focus on things i do have coded up, not what are possible

it will be sold through Lotharek's shop, so once it will be in production, it will stay in production

necrobump soundboard and simplestereo v3 was merged into simplestereo v4 and its going into production soon

i got the impression that cpu on rapidus is separated from the atari bus not only by fpga chip, but also by cpld chip that is doing all bus transactions with "slow" side, thus timings should be as they were reset is asynchronous, so you can trigger it any time within clock cycle what i also noticed during my ventures with 816 card i've made, reset was pulsed in 65xe i was using for development quite a few times each time processor wouldd fetch reset vector and start executing code, then another reset would came and situation repeated - i don't know if this was a fault of this particular 65xe, or it is true in general but maybe such behaviour would trigger some unwanted behaviour in cpld logic of bus arbiter

you would guess wrong - there is only one source of reset signal in Atari, and this is reset generator if rapidus introduces another one - fine, but i just hope it doesn't override motherboard's generated one, just feeds additional one to cpu it is running

pulling rapidus will work even more reliably and it will be faster than pulling out u1mb as you can already see, there is no other party, just their advocates

what parties?

all i can say, is that i've provided all information needed directly to the creator when asked about u1mb and its operations then all i was reading were complains here and there on how bad u1mb is. Suggestions i've made regarding futher rapidus testing were laughted at and rejected, thus i don't feel like supporting this hardware in any way if one is incompatible with another - this is unfortunate, but i'm not going to bother with this - i don't think there is any real need to use them both having resources rapidus has it will be fairly simple to implement something in shape of u1mb inside, or at least with key features that might be required (PBI bios for non-pbi devices for example)

i belive mac os x being openbsd based still has command line ultilities like fdisk and such - could you try running fdisk /dev/sdX instead? (X is you sd card assigned letter - usually it would be sdd or sdc depending on how many drives you actually have, mount might tell you something)

all true, but still, there might be something else in the process of handling these partitions not that straight forward - don't know about Jon, but when i was implementing it, i was basing it on microsoft provided documentation, so perhaps there was something specifics to these limits that infuences this behaviour first step would be to limit it to 32gb, and if result will be the same, then it is not size related after all

you can't blame power supply there - they are from difrent manufacturers, eras and generally speaking - not important important is, that power supply variances influence rapidus being functional, or not so much to end this debate, i've sent you final words of the creator to your email box, please read it, and let us forget whole thing it is not worth it - really

make it run on 20 diffrent machines with 20 diffrent power supplies, then we talk single point data set is not important you know well, that if i connect your computer to my laboratory power supply and set 5.000V @ 3A it won't work at all

64GB FAT32 partition? really? windows won't let you do it - it was limited by largest fat table possible to 32GB instead, and formating such partition under windows will result in failure to do so I guess for MacOSX you can do it, and it will be readable on Mac, but compatibility won't be there can you size it down to 32GB? it will be then within Windows FAT32 limits, and it is and was Windows FAT32 specs we were following

i do belive that 816 less cores will have far less compatibility issues than the ones runnig with overclocked 14mhz rated part i also know for the fact, that pasiu doesn't acknowledge results of simple test with 20% variance in power supply voltage, and rapidus usually doesn't work with anything lower than 5.2V on power supply from my point of view, if it doesn't work from 4.2 to 5.5V it doesn't work at all

problem with this machine were found without even installing u1mb in there, thus, futher investigation was pointless from where i stand, rapidus works only if every part in given machine was touched by the god himself, and have his blessing appearantly, he haven't touched all parts there, since problem would manifest if you would hit reset button repetivly while on rapidus boot menu all communication with the creator of rapidus, moderated by lotharek, was declined, or laughted at, so i didn't care to persue this futher - this is pointless... perhaps, in 20 years this community will have a trully working 816 solution, but since then, all we have is semi-working one that might just work for someone, and certainly not to another i won't comment on this ever again

if it also says "configuration reset" then rtc is stopped