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  1. On 11/6/2017 at 8:02 PM, JamesD said:

    Keep in mind that some of the benchmarks I've seen out there for the 6502 are highly tuned.
    I saw one where a simple benchmark that should have been under 256 bytes was 16K or something crazy like that because he had created so many tables and unrolled the loop so many times.
    He also wrote the 6809 version of the benchmark and proceeded to use one of the index registers that requires some of it's operations to use 2 byte opcodes instead of 1.
    I tried to get him to swap index registers but it was pretty obvious he had no intention of doing anything to make the 6809 code better.

    MIPS is somewhat a inaccurate way to measure processor speed.

    For example the z80 can perform instructions that goes from only 4 T-States to 23! So what is MIPS? 

    the 6502 range from 2 Clock Cycles to even 7!

    Plus they are heavily influenced by the clock frequency.

     

    Performance of a CPU cannot be measured barely by counting how many instructions can be processed per second.

    So TI's CPU can show a small MIPS value, but i do not think it is so slow as MIPS comparison say.

     

    Plus, even the clock speed is not a valuable way. Take for example the C64. It has a 6502 @ 1Mhz. Slow compared to Z80 @3Mhz. So one can think: "Why not increase 1Mhz to 3?" The 6502 with only 7 cycles in the worst case will outperform thhe z80!

     

    This is possible teoretically:

    But even 1 2Mhz 6502 could not be done on C64 because of the tightly coupling between VIC-II (that share memory with CPU) and CPU.

    When Commodore released the C128 they pushed the speed to 2Mhz but have to DISABLE the VIC-II and use another "VDP" similar to the TMS in the way it worked (no shared mem)

     

     

     

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