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About Danjovic

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  1. Full solution: lda byte1 eor byte2 sta temp lda #0 ldy #8 loop: rol temp adc #0 ; a = a + 0 + carry dey bne loop at the end a holds bit count.
  2. You can take out the MCP42100 from its socket and insert a 100k resistor between pins 9 and 10 and check the X axis reading (pins 5 and 6 for Y axis) If the reading reaches the maximum value then you either have a problem with your digipots or with the code driving it. On the other hand, if the value remains low, triple check the capacitors (measure them if possible). Check also the voltage value at pin 9 of the db-15 connector (potC).
  3. Check the timing capacitor values.
  4. Finally assembled the DIY keyboard controller I have proposed some posts ago (link). I would like to rectify the schematics as the membrane keyboard that I have acquired have a different wiring than the one I have planned to use.
  5. DIY Atari Keypad Controller built with off the shelf components (link) Schematics
  6. Danjovic

    The Wolf

    Cut the box to fit the board. It demanded a lot of handiwork, which is OK for a DIY project, but may render a serialization unworkable. In that case two options should b considered Machine a COTS box on a CNC. Custom 3D print (that nowadays can be ordered online)
  7. Q-Suco (and later Ki-Suco), was a very popular drink in Brasil. The translated brand name can be interpreted as "What a Juice". Do not remember a video game related campaign, though.
  8. Danjovic

    7800 Keyboard

    Thanks @Tempest, I have elaborated some questions: - So far we could understand that the communnication between the host and the keyboard peripheral is done 3 bits at a time (swcha.2..0), lsbits first, flipping the strobe signal (swcha.3) and waiting for the keyboard to ack by flipping the fire (inpt5) line. Can you confirm that? - We found a routine that writes a lot of data bits in 1.1.1 ended with a write with 0.0.0. is this a sync routine? - How do you manage to get in sync in short term? Or it is always necessary to repeat the long sync routine ? - how do the keyboard peripheral differentiate a read from a write? - Do the communnication between the keyboard peripheral and the host is or was intended to be bidirectional? (paced by swcha.3 strobe signal from host to keyboard an by inpt5 from keyboard to host?) - How should the host address the SIO port and the cassette port? Is there any document or specification of a higher level protocol? Did such protocol resembles the sio standard?
  9. Danjovic

    7800 Keyboard

    I keep wondering how the keyboard would differentiate a read from a write. Maybe the keyboard latches the data lines during strobe change, then it publishes its data before the ack rise, but that would require the 7800 to write 1.1.1 to the data lines after sensing the ack signal flip, and only then it would read the keyboard data. In other words a biditectional protocol with wired or data lines....
  10. Danjovic

    7800 Keyboard

    One thing that's intriguing me a timeout checking that references the address $bc. Unless there is some code running on interrupts or a hardware timer mapped at such address, it makes no sense use this address to check for a timeout. ;/// write data bits along with strobe signal and wait for ack LF966: JSR LF999 ;/// write strobe signal LF969: LDA $BC ; // what is at $bc?? BEQ LF979 ; if contents of $bc is zero, clear carry and return LDA INPT5 AND #$80 ; isolate fire button CMP $C1 ; flipped? BEQ LF969 ; no, try again (maybe something decreases the contents of $bc like a timer interrupt? STA $C1 ; yes, save state SEC ; and set carry to indicate success RTS LF979: CLC RTS
  11. Danjovic

    7800 Keyboard

    From Curt's answer to the 7800 basic Thread.. I came acress such code on the light module. It writes a long series (140+256+256) of 1.1.1 (looping at $F900) and finally writes a 0.0.0. This subroutine returns with A=0 and carry set on success. In case of a timeout due to keyboard not respond it returns with A=$ff and carry clear. LF8E5: LDY #$8C LDA #$0F STA SWCHA STA SWACNT LDA #$00 STA $C0 STA SWBCNT LDA INPT5 AND #$80 STA $C1 LDA #$03 STA $C2 LF900: LDA #$07 ; data = 1.1.1 STA $C3 JSR LF999 ;/// write data bits JSR LF9A7 ;/// wait for ack, return with carry clear on timeout BCC LF91C DEY BNE LF900 DEC $C2 BNE LF900 LDA #$00 ; data = 0.0.0 JSR LF966 ;/// write data bits along with strobe signal and wait for ack LDA #$00 SEC RTS LF91C: LDA #$FF RTS
  12. Danjovic

    7800 Keyboard

    Indeed, the code looks more polished. The clear flag is used to indicate failure by timeout. Some code simply decrement a variable as a countermeasure to timeout, but other subroutines use a value at $bc that I suppose it is decremented by a timer. Nevertheless I did some annotation on the code for the light module. lightmodule.asm
  13. Danjovic

    7800 Keyboard

    At this point I think it is safe to tell the pinout of the keyboard. The data lines are visible wired or, which means that they can float or they can be held at zero, which makes plain sense given the datasheet of the pic microcontroller used on the keyboard. Pin Name Direction (keyboard centric) 1 Data0 bidirectional 2 Data1 bidirectional 3 Data2 bidirectional 4 Strobe 7800->Keyboard (input) 5 n.c. 6 Ack Keyboard->7800 (output) 7 Vcc 8 Gnd 9 n.c.
  14. Danjovic

    7800 Keyboard

    Speaking of dead code I think I found some too on the star typer. What I am missing is some kind of sync on the protocol, to make sure that we have the right bits every call of the $dff6 subroutine. I think I found one place where bits are being written to the port but I have to confess that the code is getting way above my knowledge of 6502 assembly. LDE21: a9 0f 8d 80 02 8d 81 02 A9 E0 20 1E DE24 A9 0F LDA #$0F DE26 8D 80 02 STA SWCHA DE29 8D 81 02 STA SWACNT DE2C A9 E0 LDA #$E0 LDE22: 0f 8d 80 02 8d 81 02 A9 E0 20 1E DE22 0F ??? DE23 8D 80 02 STA $0280 DE26 8D 81 02 STA $0281 DE29 A9 E0 LDA #$E0 LDE24: 80 02 8D 81 02 A9 E0 20 1E DE24 80 ??? DE25 02 ??? DE26 8D 81 02 STA SWACNT DE29 A9 E0 LDA #$E0 LDE21: ; not referenced Dead code? LDA #$0F LDE23: STA SWCHA STA SWACNT LDA #$E0 JSR LE01E BCC LDE18 ; -> sample current trigger state, save on #91, return with DEY BNE LDE24 ; ? makes no sense DEC $69 BNE LDE22 ; ? makes no sense LDA #$00 JMP LDFE7 ; write 3 bits then return ; sync ? LDE3C: LDA #$00 JSR LDFE7 ; write 3 bits in 0 then flip bit 3 JSR LDFB8 ; read a byte BCC LDE5E ; return if carry clear - should never happen STA $93 ; save byte read LDA $95 ; BNE LDE5F ; ?? LDX $93 ; BEQ LDE5E ; return if zero LDA LDEA0,X ; table index ? BCC LDE5E ; return if carry clear LDE55: STA $94 ; table return (scan code translation ?) JSR LDE8D LDA #$1E STA $95 LDE5E: RTS LDE5F: ??
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