Omegamatrix

There's various utilities, or you can even use the command line. I usually use HOM3.

If you split the Yar's rom in half and throw away bank 0, then you will find the exact PAL version there so this dump as 8K is bad. With Sea Hawk (PAL) the logo is erased. Also, the last byte of the rom is changed from $00 to $FB. That byte looks unused. Mr Gobler is NTSC Pac-Man with the logo erased. I did a comparative disassembly of the Gangster Alley review cart. GangsterAlley(NTSC).zip

No changes in graphics or gameplay. Great!

I've long suspected the HES version of Robot Tank would be different, and sure enough it was. RobotTank(AllVerisions).zip I've included a disassembly that can compile all versions of Robot Tank. The dump is good, but if you fire this up in Stella it will incorrectly auto-detect the rom as FE. You need to manually configure the game properties so that the type is F8 (8K Atari). Now the only question is if there is an NTSC F8 version of Robot Tank out there, and undumped. I feel that there is a good chance there is.

Yes, that was what I was thinking... using VBLANK jiust where the cityscape is drawn. I believe the timing lines up perfectly.

Consider turning VBLANK on/off to create both borders. The timing would be: - VBLANK off with a write ending on cycle 25 - VBLANK on with a write ending on cycle 73

I added a link on the first post for Bob Colbert's homebrew, Stell-A-Sketch. This homebrew uses an Amiga Mouse, Atari Mouse, Driving Controller, or a Joystick! Pretty cool!

Sneak 'n Peek (Carrere Video): Sneak 'n Peek (Carrere Video) PAL.bin

I like flashcatjazz's code. I haven't tested it but it looks like it will work. I did notice some repeated code, so in this case we could load X with the high byte and put the multiply by eight in front of the division routine. It would save 13 bytes I think. divisor = $80 dividend = $82 remainder = $84 result = dividend ; save memory by reusing divident to store the result org $2000 .proc ConvertCoordinates ldx cx+1 ; process x lda cx ; multiply x by 8 mva #5 divisor jsr MultEightThanDivide ; leaves result in dividend mwa dividend NewX ldx cy+1 ; process y lda cy mva #3 divisor jsr MultEightThanDivide ; leaves result in dividend mwa dividend NewY rts .endp .proc MultEightThanDivide stx dividend asl rol dividend+1 ; mult by 8 asl rol dividend+1 asl rol dividend+1 sta dividend .proc Divide lda #0 ; preset remainder to 0 sta remainder sta remainder+1 ldx #16 ; repeat for each bit: ... DivLoop asl dividend ; dividend lb & hb*2, msb -> Carry rol dividend+1 rol remainder ; remainder lb & hb * 2 + msb from carry rol remainder+1 lda remainder sec sbc divisor ; divisor is always 8-bit tay ; lb result -> Y, for we may need it later lda remainder+1 sbc #0 bcc skip ; if c=0 then divisor didn't fit sta remainder+1 ; else save substraction result as new remainder, sty remainder inc result skip dex bne divloop rts .endp

It is possible that there was unexpected dependency elsewhere in the code that the bit instruction changed the flags for (N V Z). If the register that was being BIT tested was undefined then it could turn into a nasty bug.

I made a new demo, Animatrix 2. I like it a little better than the original Animatrix. ; 32 byte demo, Animatrix 2 ; by Omegamatrix ; last update Oct 08, 2018 processor 6502 LIST OFF include vcs.h LIST ON ORG $F800 .byte $FF ORG $FFE0 Start: ;SP=$FD at startup .loopClear: asl tsx pha bne .loopClear ;RIOT ram $80-$F6 clear, TIA clear, SP=$FF, A=0, X=0, carry is clear .doVSYNC: lda #$38 ; does two lines (non-Vsync), and then the regular 3 lines of VSYNC sta GRP0 .loopVSYNC: sta WSYNC sta VSYNC lsr bne .loopVSYNC dey sty HMP0 .loopKernel: sta WSYNC sta HMOVE sty COLUP0 dex bne .loopKernel ; X=0 ORG $FFFC ; CPX #$FF .word Start bne .doVSYNC ; always branch Animatrix 2.bin

The board is a cool idea. I thought this thread was dead because no one was submitting demos, but seeing the board inspired me some more. So here are my final two demos. NewDemos.zip

Also if my colors seem off it's because I am colorblind.

Hello Karl, This comes up quite a bit. You can minimize the impact by doing some game logic: ;paddle (P0) on leftside of screen left border = M1 = blue right border = M0 = pink ball = P0 = pink paddle = P1 = blue ;paddle (P0) on rightside of screen left border = M0 = blue right border = M1 = pink ball = P1 = pink paddle = P0 = blue The problem then becomes the paddle will hide behind the arena border depending on the outcome. This is probably better than the ball being hidden, but it can also be improved with even more game logic to see if either the paddle or ball is over either border. In the scenario that just one object is on a border give it priority. If both objects are over different borders than that will naturally work out. If both objects are over the same border give the ball priority. The paddle will be behind the border in this case but hopefully not for long.

This is very cool, and exciting! Thank you for the pictures.

I made a few more roms, and these were the better ones of them: short32_ACD.bin short32_Cubix.bin short32_DiskData.bin

I made one more. Looks cool in Stella. ; short 32 byte demo (New Gold Dream) ; by Omegamatrix ; last update Sept 11, 2018 processor 6502 LIST OFF include vcs.h LIST ON ORG $F800 .byte $FF ORG $FFE0 Start: ;SP=$FD at startup .loopClear: asl pha tsx bne .loopClear ;RIOT ram $80-$F6 clear, TIA clear except VSYNC, SP=$00, X=0, A=0, carry is clear .doVSYNC: lda #$0E << 2 ; does two lines (non-Vsync), and then the regular 3 lines of VSYNC .loopVSYNC: sta WSYNC sta VSYNC lsr bne .loopVSYNC .loopKernel: sty HMP0 sta WSYNC sta HMOVE sty GRP0 sty COLUP0 dey bne .loopKernel .byte $0C ; NOP, skip 2 bytes ORG $FFFC .word Start beq .doVSYNC ; always branch Here's the rom: short32_NewGoldDream.bin

I had a bug with the sound rom through the first loop, as Y is unitialized so you don't know what register it writes to. Solution, flip Y and X, as X=0 after the clear loop. I also moved VSYNC right after WSYNC, so that it is more standard. ; short 32 byte demo, with sound! (rev b) ; by Omegamatrix ; last update Sept 11, 2018 processor 6502 LIST OFF include vcs.h LIST ON ORG $F800 .byte $FF ORG $FFE0 Start: ;SP=$FD at startup .loopClear: asl pha tsx bne .loopClear ;RIOT ram $80-$F6 clear, TIA clear except VSYNC, SP=$00, X=0, A=0, carry is clear .doVSYNC: lda #$0E << 2 ; does two lines (non-Vsync), and then the regular 3 lines of VSYNC .loopVSYNC: sta WSYNC sta VSYNC sty AUDC0+5,X ; write to each audio register dex lsr bne .loopVSYNC tax ; X=0 dey ; scroll color and shape .loopKernel: sta WSYNC dey sty COLUBK dex bne .loopKernel .byte $0C ; NOP, skip 2 bytes ORG $FFFC .word Start beq .doVSYNC ; always branch Here's the new rom: short32_sound_b.bin

I made a new demo, with some sound! Not to sure what to expect or real hardware. If you try this make sure it is a single rom image on Harmony. ; short 32 byte demo, with sound! ; by Omegamatrix ; last update Sept 11, 2018 processor 6502 LIST OFF include vcs.h LIST ON ORG $F800 .byte $FF ORG $FFE0 Start: ;SP=$FD at startup .loopClear: asl pha tsx bne .loopClear ;RIOT ram $80-$F6 clear, TIA clear except VSYNC, SP=$00 .doVSYNC: lda #$0E << 2 ; does two lines (non-Vsync), and then the regular 3 lines of VSYNC .loopVSYNC: sta WSYNC stx AUDC0+5,Y ; write to each audio register dey sta VSYNC lsr bne .loopVSYNC tay ; Y=0 dex ; scroll color and shape .loopKernel: sta WSYNC dex stx COLUBK dey bne .loopKernel .byte $0C ; NOP, skip 2 bytes ORG $FFFC .word Start beq .doVSYNC ; always branch short32_sound.bin Edit: added a modified rom padded to 2K for ease of use.

Okay, here is a demo I just made: ; short 32 byte demo, rev b ; by Omegamatrix ; last update Sept 11, 2018 processor 6502 LIST OFF include vcs.h LIST ON ORG $F800 .byte $FF ORG $FFE0 Start: ;SP=$FD at startup .loopClear: asl pha tsx bne .loopClear ;RIOT ram $80-$F6 clear, TIA clear except VSYNC, SP=$00 .doVSYNC: lda #$0E << 2 ; does two lines (non-Vsync), and then the regular 3 lines of VSYNC .loopVSYNC: sta WSYNC sta VSYNC sta CTRLPF ; reflect for symmetrical PF2 lsr bne .loopVSYNC dex ; scroll color and shape .loopKernel: sta WSYNC dex stx PF2 stx COLUPF dey bne .loopKernel .byte $0C ; NOP, skip 2 bytes ORG $FFFC .word Start beq .doVSYNC ; always branch It's padded to make up the 64 bytes. In the start-up routine I take advantage of the SP being at $FD, so it is a 5 byte clear. There was a thread a while back about the SP being at $FD at power on. That trick probably won't work if you are loading this rom through the harmony cart menu screen, as the SP might not be at $FD. If you flash the game as a single rom image then it should work. I haven't tested it on real hardware yet, but a single rom image would be important. short32_b.bin Edit: Originally I had the 5 line VSYNC like others have posted, and whether that worked or not was dependent on how tolerant your TV was. I have since changed it to a regular 3 line VSYNC with a couple extra lines of to make up the 262 total. I also redid the rom to be padded to 2K for ease of use.

Might be very useful then.

If you are not worried about decimal mode, then you can drop the CLD from my clear routine: cld .loopClear: ldx #$0A ; ASL opcode = $0A inx txs pha bne .loopClear+1 ; jump between operator and operand to do ASL The result from it is all TIA registers cleared, RIOT ram clear, SP=$FF, A=0, X=0, Carry is clear, and all in eight bytes! In this case it would be seven bytes if you lose CLD, which normally you would not do. You are thinking of LXA (opcode $AB). Unfortunately it is unstable. LAX however is stable, but yeah no immediate mode.

Maybe he just wanted a 2nd copy. I've done that with a few games, and no it wasn't to choke the market, or increase the value.

$15K is a lot of dough. My thinking is this would top out at $3.5K (which is a lot of dough). Time to take the money and run.

FYI, Cat Trax is also on the Screen Search console (menu selection 36).