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PacMan

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Everything posted by PacMan

  1. PacMan

    BreakInvaders

    I kind of like this dude, He has the same mentality that of our project managers at work. "Go read the manual, then implementation must take no more than two weeks." *hehe*. /P
  2. PacMan

    BreakInvaders

    I have no knowledge of NES nomenclature, What is a PSG ? But the Atari 6502 (Sally) is also a custom version of the good old 6502 device. It features a usefull HALT input enabling external devices to do DMA into the 6502 memory space.
  3. Maybe I should have mentioned that I have created a special version of DevOS which can download and FLASH the monitor FLASH device on the RAMCart. This special DevOS also makes use of the X-Board which has 128KRAM, much easier to work with rather than having to squeeze everyting into 4K, But that's just me, I'm lazy..... /P
  4. Bruce, Any news on these boards, me want a couple to play with /P
  5. Got the USB port to work tonight. The VSP driver nicely connects to the module and I was able to stream data from the PC virtual serial port down to the A7800. Seems I will be able to download a lot of data very quickly. More to come. /P
  6. PacMan

    Svenskar??

    Å här en sent tillkommen.
  7. You are absolutely correct, the CC2 has a 115200 baud serial port which can be used for downloading and running software. I guess that this is how many developers test their code, this is certainly how I have done with my test shoots. There is however no way (yet !?) that you can insert, monitor and manage break points, look at register content, single step your code etc. through that interface. The RAMCart is specifically designed for that purpose. Having said that I am almost sure that the CC2 could be programmed to do that as well if someone wanted to. /P
  8. Modern FPGA chips often contains embedded functions like RAM, Clock Managers etc. which makes life easy for the FPGA designer. Depending on your choice of ASIC manufacturer you may or may not find similar or identical functions for you to use in your design. So to answer your question, No you probably don't need to totaly redesign the VHDL model you created but it may need adaption to the ASIC libraries. I know for instance that there are ASIC manufacturers that can take code written for Xilinx Spartan FPGA's and synthesize your code pretty much directly into their ASICs. /P
  9. Basically yes, Although I am not to familiar with the original dev.kit this is probably similar in basic functionality. /PacMan
  10. Just to give you all some input on the concept of the RAMCart. It is not something that tries to replace the Cuttle Cart. It's more of an complement to it. The RAMCart only has RAM for downloading and debugging code. The idea with the RAM is that it is easy to download code and manipulating the content of the RAM. This makes it easy to insert break points, update the code on the fly etc. The USB interface makes it possible to do all of this extremly fast. The idea is to have an A7800 (or generic Atari) platform on the host computer (Windows/Unix/Apple) where you do all development, building and debug under the same framework. The framework could also provide templates for often required code, graphic editors for creating/editing sprites and a lot of other stuff to help in development. My initial idea is to write the framework in Java to be able to be platform independant but I am open to any ideas that you may have. /PacMan
  11. Hi all, A few months back I started to think and sketch on a RAM based development system for my A7800. I wanted to create something that would be as easy to use as most modern development tools available for embedded development. The result became something I call the RAMCart and is described on my webpage www.x-game.se under projects. The last couple of weeks though, I have found it increasingly difficult to master up the energy to get this project finnished, or even to update the web with the latest developments I guess what I need is a kick in the rear to either just drop it and throw the garbage in the bin or get the project going again and conclude the last stages. Thus, the reason for my post. If anyone has the energy to look into my pages and maybe throw some ideas, critique, rack down on the design or just cheer me on i would appreciate it. Any comments are welcome. The current status is that I have the CPLD, FLASH and SRAM in place and the logic in the CPLD seem to do what it is supposed to do. The USB controller is soldered in but not tested yet. I have written code to test the separate blocks and have done some preliminary tests with a HLL debugger called NoIce. OK guys (and girls) questions anyone ? /P
  12. Any news on your RAMcart for the 7800? It looks really cool. 1004401[/snapback] Ahhmm, the news section
  13. I now have a small batch of XBoards available for those interested. If you want to know more or if you want one you can go to my new webpage http://www.x-game.se /PacMan
  14. This is not necesserily true, most modern SRAM's designed for low power operation contains necessary protection circuitry for this. I have designed several commercial applications using Bruce's or similar method without any hitches. Of course, the EEPROM is a much better solution, in every aspect, if you are only going to save high scores. /PacMan
  15. The question should not be IF, it should be when. Since I got the 128-in-1 USB Flash Cartridge and filled it with goodies, the X-box and the PS2 have been bannished from the TV. Everyone loves it, simple games, easy to learn and really good controllers !! A few games are hard to play, but that is really not the controllers fault. So get one while they are still inexpensive. /PacMan
  16. Something to think about for the MARIA and her accessing memory for DMA. The MARIA has two different modes of DMA, fast DMA for Zone-list, display-list and character maps. These DMA cycles needs to have access to a memory with an access time of maximum 165nS (According to the datasheet). Note that this applies to a memory connected directly to the MARIA to one of the chip select signals RAM0CS- or RAM1CS-. There is also a slow DMA mode for graphic objects which is much more relaxed and would normally never cause any problems. If we analyze the fast DMA mode more closely and start tracing the signals involved in the DMA cycle out from the MARIA we can deduce the following: - There is a 15-18 nS penalty for the 74LS08 gate onboard the A7800 motherboard. - There is 15-18 nS penalty per gate (two of them) in the C300565 cartridge. The 15-18 nS delays were taken from old TTL data sheets found in the old section of my data book library. They are maximum times at a load of 50pF which is very realistic, all lines going out to the cartridge can be expected to see that kind of load. Totaly there is a line delay of maximum 54 nS out to the Cartridge RAM. Calculating backwards we now see that the cartridge need to be equiped with an SRAM no slower than 111nS accesstime. This means that using a standard 120nS or 150nS SRAM in the cartridge will make the MARIA fail in its fast DMA transfers. Slow DMA's and CPU accesses will be OK though. I have been experimenting a lot lately with this while trying to design a debug cartridge for the A7800 and found that even a 100nS RAM will fail occationally with my board layout. 85nS seem to do the trick though. The XBoard that I designed previously also works OK with the fast DMA so I think I am in the correct direction. These are just my findings when working on the hardware and anyone with better knowledge is encouraged to correct my statements. /PacMan
  17. It most definitly does so. Currently I have 30 PCB's in my hand, and will be starting to assemble and testing these during the christmas holiday. For those of you with the MARIA chip soldered to the mother board I will be offering to desolder the MARIA chip, replace it with a socket that can hold the XBoard and finally test the unit. You need to ship the A7800 motherboard to me and pay for the return postage. More information on the final board and the upgrade service will follow as soon as I have the time to finalize it. /PacMan
  18. Why do you want to use a 7402 when the board is designed for 7404 ? /P
  19. I just received an A810 that I got from ebay. On the outside it's in fair condition, a little yellow from the sun but otherwise in good condition. On the inside however it looks completely brand new. There is not a spec of dust in there and the drive doesn't show any sign of wear. I'm totally amazed to find equipment in this good condition after 20+ years. Yipiii. /P
  20. PacMan

    6502C behaviour ?

    Thanks guys, Got the FPGA prototype working properly in my 7800 now, so moving on to more integration. /P
  21. PacMan

    6502C behaviour ?

    Does anyone know where I can get a copy of the schematics for the Atari 800 CPU board It should contain all the details about how the HALT signal is implemented. /P
  22. Does anyone know the exact behaviour of the HALT pin of the Atari 6502C ? Do all the CPU bus control, address and data pins get tristated ?? /P
  23. I whish i had a life to keep me away from doing these things Here's a suggestion on how a possible scaled down PCB (handheld ?) 5200 could be built. It's built around a Xilinx FPGA which holds both the 6502 and the POKEY (Known technology) and all related glue logic. I replaced the DRAM with an SRAM and placed a FLASH memory on board for the bios. This design suggestion is based around the idea of having a SD/MMC card for the games instead of the orig. carts. A bios needs to be developed that can read the SD/MMC cards and load games into RAM before running them. Pretty much like the cuttle cart 2 for the 7800. The size for this PCB is 90mm x 52mm but could possible be adapted to fit into a gameboy case or something similar. I know you are wondering about the analog joystick and keypads.. Well new analog joysticks for mobile phones are currently being developed and marketed so this is definitly an option. Haven't worked out the keypads yet though. *sigh* Oh life, where art thou.
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