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Found 6 results

  1. Think I read somewhere that the F18A also supports a 30 rows/80 character mode as opposed to the "normal" 24 x 80 columns mode. If that is true, can someone point me how the F18A VDP registers must be set to activate the mode? Thanks retroclouds *EDIT* It's 30 rows, not 31 rows.
  2. I know this is very elementary, but I have a couple simple questions for you guys. LOOP BLWP @VSBW INC R0 DEC R2 JNE LOOP How does JNE know to look at R2 here... is it the fact that R2 was the last register referred to in the source? For instance, if the code was written: DEC R2 INC R0 JNE LOOP Then would JNE look at R0? I don't have any reference material on me right now, and my slow-ass tethered internet is not allowing me to DL anything to help me out. Sorry. =) **I have a couple more questions as well, but I'm going to read through the assembly threads on here before I start asking questions which have already been answered. This forum is amazing for knowledge. =)
  3. I was trying to get some infos about other Basic Releases for the 9900, and by accident found out that there are updated versions of our beloved TI Basic. This is the documentation for 4.1 of TI Basic: http://bitsavers.informatik.uni-stuttgart.de/pdf/ti/990/basic/2308769-9701A_BASIC_refMan_Dec83.pdf Syntax, coding, editing, even save/run/old and their use of devices is looking almost exactly like TI Basic/ XB. There are nice enhancements, the subroutines of most CALL statements are not included. The Software was released for the TI-990 minicomputers back in 1983, those machines are running on a variant of the TMS 9900 cpu. So far I found the binaries of TI Basic 3.1 Installation Disk: ftp://www.cozx.com/pub/ti990/disks/basic_3.1.0_ins.dsk http://www.cozx.com/~dpitts/ti990.html Couldn't run the linux utility to extract the single files from the DS10 disk image. Don't know if this Basic is double interpreting (Basic Interpreter/GPL interpreter) like our TI Basic, or if this is a GPL free TI Basic version that has the same look and feel of our Basic. The question is, can this be of any use for our 99/4a or even a replacement?
  4. For testing a CPU core, I'm looking for diagnostic routines that test the functionality of a 9900 CPU. Maybe this was developed for one of the emulators? Or were those debugged by just throwing a lot of programs at them and fixing bugs where they did not execute as expected? All suggestions welcome.
  5. The Wikipedia page about the 1292 Advanced Programmable Video System claims it was particularly difficult to program: It made me curious. Did nearly every other processor and microcontroller back in the 1970's default to opcode $00 equals NOP? So far I have found the following: Zilog Z80 and Intel 8080: $00 = NOP (No Operation) Intel 8048 : $00 = NOP (No Operation) RCA 1802: $00 = IDL (Idle) So far, so good. But how about the others? MOS 6502: $00 = BRK (Break, causes an interrupt) GI CP-1610: $0000 = HLT (Halt, not sure what it does but likely not NOP) Motorola 6809: $00 = NEG $nn (not entirely sure about this syntax, but at least NEG) Signetics 2650: $00 = Branch to address in immediate register B (per the Wikipedia article) I failed to look up what the TMS-9900 and the Fairchild F8 do with opcode $00 or $0000. It seems that Motorola 6801/03 doesn't define $00 at all. Likely I have missed some relevant processors and microcontrollers of the time, but it seems like the article describes how a programmer used to Intel or Zilog would be confused about the Signetics. Programmers used to MOS, GI or Motorola may have been confused too, but at least not expecting NOP. Now machine code programming has far more interesting challenges than which instruction equals which value when encoded as binary/hex/decimal data, I would think that works out rather quickly, in particular if you were able to have a cross assembler on some mini computer or similar when developing software for the 1292 APVS series.
  6. This guy has tried to estimate MIPS on some CPUs from the seventies. http://drolez.com/retro/ That doesn't look too good for the 9900. And maybe performance was further crippled, when comparing computers, with the TI-99/4A shoehorn design including multiplexer, wait states and read before write stuff.
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