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Found 1 result

  1. Although this was originally discussed in the 1088XLD topic, I felt this needed a topic of its own in order to not derail the XLD discussion more than I already have. So I decided to branch this off into its own topic. Let's talk about a GBS-8200 (HD 9800) XLD carrier board for high quality almost zero lag RGB to VGA output conversion, with RGB sourced from either a Sophia or VBXE. In fact I'll be calling this board RGB2VGA-XLD from this point forward to keep things simple. To obtain optimum results from the GBS-8200 which is a Chinese produced off the shelf Arcade Video Conversion board, it'll need to have the original firmware in the TV5725 video scaler chip replaced with custom presets (video parameters). Luckily the GBS-8200 pretty much comes ready to do this right out of the box, only requiring the addition of a 4-pin header (P5) and a jumper (P8), and some sort of external processor to poke in the new presets. Edit: my intentions are to create this in a carrier/mounting board version for the XLD, as well as a small I2C plug-in only version to just modify the GBS-8200 presets, thus keeping the target system this is aimed at more generic (i.e., XE, XL). There are some very nice 3D print designs that can be used to house a GBS for external use. The first attempt at creating custom presets for the GBS-8200 that I am aware of, was done by a guy with the alias of dooklink over at the schmups forum. His project revolved around the use of a Raspberry Pi to reprogram the presets via a bit-banged I2C interface. Later a guy by the name of Bruce Abbot at bhabbot.net.nz figured out how to get this working on a ATTiny681 chip, which is what I ran my initial tests with. However recently I decided that I wanted to transition this over to a different embedded processor chip called the PIC, which would allow for re-flashing via a JOY2PIC, just like all the other PICs currently being used on the 1088XLD. However my endeavours to do this have not faired well, and I have hit a wall which I have yet to climb over. Basically I think my scaler preset tables are correct and my I2C routines seem to be working properly when checked on a scope, but thus far no dice on getting a proper image to appear from the VGA output. My PIC code is being written in Great Cow Basic which is a free code development package, thus allowing it to work for either an AVR or PIC chip, while being done in an easy to understand syntax allows modifications to be easily made by others that chose to do so. Well assuming I can get this work in the first place . Here's my code... Initially I only have it targeting a PAL display, but once I get this working it'll be a simple matter to add a switch to change to NTSC mode. I also I plan to migrate this into a PIC12F1572 8-pin PIC, which sells for around $0.71 a piece. #chip 16F1847 ;Define I2C settings #define I2C_MODE Master #define I2C_DATA PORTA.0 #define I2C_CLOCK PORTA.1 ; #define I2C_BIT_DELAY 200 us ; #define I2C_CLOCK_DELAY 20 us ; #define I2C_END_DELAY 20 us #define I2C_ADDRESS 0x2E ;address of the slave device ;Define Switch and LED ports #define LED PORTA.2 ;==================================================== ; Main Program Loop ;==================================================== Dir LED Out LED=0 ;turn ON LED wait 500 ms for segment = 0 to 5 I2CStart I2CSend I2C_ADDRESS I2CSend 0xF0 ;access Bank Register I2CSend segment ;set to New Bank (point to segment) I2CStop I2CStart I2CSend I2C_ADDRESS if segment=0 then I2CSend 0x40 ;register start address for Segment 0 else I2CSend 0x00 ;register start address for Segment 1-5 end If index = segment+1 readtable Slen, index, Nbytes ;retrieve segment length ;send the presets for register = 1 to Nbytes Select Case segment Case 0 readtable P0, register, data Case 1 readtable P1, register, data Case 2 readtable P2, register, data Case 3 readtable P3, register, data Case 4 readtable P4, register, data Case 5 readtable P5, register, data End Select I2CSend data next register I2CStop next segment ;all done - flash LED Do Forever: wait 500 ms LED=1 wait 500 ms LED=0 Loop ;==================================================== ; Preset Tables ;==================================================== ;Define Segment Lengths Table Slen 32 144 64 128 96 112 End Table ;288p 50Hz 1280x1024 Preset Tables Start Here ; Bank 0 --------------------------------------------------------------------- Table P0 ; 40-5F: misc. data 7, 0, 0, 0, 0, 0, 174, 223, 4, 5, 195, 163, 26, 1, 97, 0 144, 12, 62, 0, 0, 100, 2, 179, 6, 123, 0, 56, 1, 0, 0, 0 End Table ; Bank 1 --------------------------------------------------------------------- Table P1 ; 00-2F: input format 96, 224, 100, 255, 255, 255, 255, 255, 255, 255, 255, 79, 134, 5, 89, 203 18, 0, 71, 0, 44, 3, 92, 0, 87, 3, 135, 0, 111, 2, 16, 0 56, 0, 146, 3, 155, 6, 159, 6, 4, 0, 0, 0, 0, 0, 0, 0 ; 30-5F: HD bypass 202, 0, 128, 0, 63, 0, 128, 44, 204, 0, 0, 0, 0, 1, 192, 0 0, 1, 192, 0, 0, 1, 192, 0, 0, 1, 192, 0, 0, 1, 192, 0 0, 1, 192, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ; 60-8F: Mode detect 208, 34, 32, 39, 65, 62, 178, 154, 78, 214, 177, 142, 124, 99, 139, 118 112, 98, 133, 105, 83, 72, 93, 148, 178, 70, 198, 238, 140, 98, 118, 156 0, 0, 53, 0, 0, 12, 202, 0, 0, 0, 0, 0, 0, 0, 0, 0 End Table ; Bank 2 --------------------------------------------------------------------- Table P2 ; 00-3F: deinterlace 255, 3, 204, 0, 0, 0, 5, 5, 7, 0, 76, 4, 204, 152, 255, 73 33, 136, 142, 0, 0, 0, 124, 35, 214, 208, 0, 16, 0, 0, 0, 16 81, 2, 4, 15, 0, 0, 76, 12, 0, 0, 0, 0, 0, 0, 0, 0 0, 0, 52, 0, 136, 71, 3, 11, 4, 100, 11, 4, 143, 0, 0, 0 End Table ; Bank 3 --------------------------------------------------------------------- Table P3 ; 00-6F: Video processor 244, 164, 194, 176, 164, 6, 23, 124, 194, 150, 0, 0, 6, 8, 128, 226 164, 15, 16, 172, 128, 152, 194, 35, 2, 0, 0, 0, 0, 0, 0, 0 0, 0, 0, 96, 3, 0, 207, 38, 32, 220, 17, 224, 47, 32, 240, 64 26, 0, 0, 0, 125, 31, 44, 0, 0, 0, 0, 0, 0, 144, 0, 2 3, 0, 0, 248, 31, 248, 31, 248, 30, 208, 32, 248, 10, 142, 30, 48 0, 56, 8, 36, 10, 11, 234, 26, 0, 0, 26, 0, 196, 63, 4, 4 155, 128, 9, 233, 239, 127, 64, 210, 13, 216, 223, 63, 0, 0, 0, 0 ; 70-7F: PIP 8, 0, 180, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 End Table ; Bank 4 --------------------------------------------------------------------- Table P4 ; 00-1F: memory 130, 48, 0, 0, 48, 17, 66, 48, 1, 148, 17, 127, 0, 116, 0, 6 0, 146, 1, 1, 150, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ; 20-5F: capture/playback + FIFOs 0, 43, 3, 31, 255, 255, 207, 255, 255, 31, 0, 164, 30, 0, 128, 0 0, 0, 0, 8, 0, 0, 16, 180, 204, 179, 0, 2, 0, 4, 3, 0 4, 0, 105, 0, 255, 255, 7, 255, 255, 7, 0, 68, 0, 224, 40, 62 192, 0, 0, 0, 104, 1, 192, 180, 204, 90, 204, 76, 0, 0, 0, 0 End Table ; Bank 5 --------------------------------------------------------------------- Table P5 ; 00-1F: ADC 216, 0, 87, 241, 0, 0, 63, 63, 63, 127, 127, 127, 0, 0, 0, 0 0, 144, 179, 198, 0, 0, 32, 206, 133, 130, 0, 0, 0, 0, 128, 4 ; 20-6F: Sync processor 208, 32, 15, 0, 64, 0, 5, 0, 0, 0, 15, 0, 0, 4, 0, 4 0, 47, 0, 40, 3, 21, 0, 4, 4, 15, 10, 0, 0, 0, 192, 3 11, 39, 6, 126, 6, 0, 192, 5, 192, 4, 192, 52, 192, 103, 192, 103 192, 0, 192, 5, 192, 192, 33, 192, 5, 192, 1, 200, 6, 0, 0, 0 0, 0, 0, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 End Table Here's the register map for the TV5725 video scaler chip on the GBS-8200: TV5725 Register Map.pdf The full document describing the registers: TV5725 Registers Definition v1.1.pdf And the programming Guide: TV5725 Programming Guide.pdf The TV5725 is one very capable chip, but as such, it is also very complicated. So I wasn't about to write the new preset tables from scratch, and instead copied this over from the original ATTiny681 project, although for test purposes I divided it up into the different segment (bank) assignments and functions. The following describes the I2C communication for updating the TV5725's internal registers. With an I2C read being done by using a slave address of 0xAE, and a write uses a slave address of 0x2E. To set a base address (also called a segment), 0xF0 is sent following the 'write' slave address, with the next byte sent equal to segment 0-5 which sets the register bank you'll be talking to. Finally the register address within the segment is sent, then followed by the new preset data. 10.2 I2C writing When writing to 5725, the slave address is AE/2E H . A control sequence as following: • Write to One Control Register Start Signal Slave Address Byte (R/W Bit = Low) Base Address Byte Data Byte to Base Address Stop Signal • Write to Consecutive Control Registers Start Signal Slave Address Byte (R/W Bit = Low) Base Address Byte Data Byte to Base Address Data Byte to (Base Address + 1) Data Byte to (Base Address + 2) Data Byte to (Base Address + 3) .................. Stop Signal If any of you coders see where I'm going wrong please feel free to point it out . The original ATTiny681 code: GBS_Control-ATTINY681.tar.gz
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