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Found 8 results

  1. I will be using this thread to document the development of a new programmer editor for the TI-99/4a called "TiVi". (pronounced "TV" or "TeeVee") As you might expect from its name, the editor is somewhat inspired by the unix editor "vi" and will also take elements of "tmux". So what do I have in mind: Designed from the ground up for 80 columns mode, specifically using the F18A but 9938 will be supported as well. Designed from the ground up for using SAMS card, albeit 32K memory expansion should work as well. Will support FinalGROM 512K bankswitched RAM in addition to SAMS and 32K memory expansion, useful for those without SAMS and PEB. Programming language of choice is TMS9900 assembly language The editor itself will run from cartridge space (multi-bank cartridge). Uses my spectra2 library as foundation (been doing major changes in the last couple of months, not related to games) Will have some "API" so that I can integrate with external programs and go back and forth between programs. Would like to add some kind of mouse support. This will not be a GUI in the traditional sense. If you used tmux with a mouse before you know what I mean. Possibility to have multiple editor panes open at once. Should handle files with up to 65536 lines when using SAMS or FinalGROM 512K bankswitched RAM. Undo functionality, well up to a certain extent that is. Language awareness, e.g. behave differently based upon language (e.g. assembly, C, Basic, ...) Internal text representation will be decoupled from what actually will be rendered on screen. Should make the editor more responsive when dealing with large files, allow split panes, etc. Reconfigurable keymaps, possibility to swap between keymap with single key combination. Not everyone is into VI This is the start of a large project and I don't expect to have a truely useful version anytime soon. I expect this project to take multiple years, but you gotta start somewhere. Now I've taken my mouth full, I will use this thread to keep myself motivated 🙂 There aren't too many resources out there discussing the architecture of a text editor, so cross-linking here. Dr. Dobb's Journal 1993 - Text Editors: Algorithms and Architecture Gap Buffers: a data structure for editable text Rope (data structure) - Wikipedia Vi Editor: Why Programmers Think This Old Editor is Still Awesome Threads on Atariage discussing topics -somewhat- related to TiVi: F18a 30 rows 80 columns mode F18A high-resolution timer CRU scan sample code, my implementation of a CRC-16 Cyclic Reducancy Check DSRLINK Code Tutorial File operations in assembly language E/A file access Opinions on TI-99/4a text file formats Favourite text (programmers) editor on the TI-99/4a Better keyboard scanning? Others: tmux for developers
  2. I'm currently implementing file access in my TiVi editor. The editor is designed to run in 80 columns mode. My question is what text file formats should be supported? I mean DIS/VAR 80 for sure. But are there editors out there that support other file formats as well. Does it make sense to implement scrolling in the editor so that I can let say open a file with 255 record length and show it on a single line with scrolling? Any opinions on that?
  3. Hi everybody, I'm looking for some good working examples of doing disk file I/O operations in assembly language. Already looked at section 3 DSR (Device Service Routine) / Disk & File Management in the development resources thread. Lots of good stuff there, but seeing some working code definitely would help. What I want to accomplish is to create, read, update text files and load binary files. Basically I'd like to write a small programmer's editor for running on the TI-99/4a. For keeping things simple and compatible with as many disk devices as possible I would only focus on level 3 I/O calls. Now here's where things get tricky. I want to use my spectra2 library for most of the stuff. I learned that scratchpad memory and VDP memory must be setup in a certain way for DSR calls to work successfully. Currently I'm exclusively using scratchpad memory for all my stuff, so will have to reallocate that to somewhere else. That should be possible easily enough. Now here are my questions: 1. Does a scratchpad memory map exist, with the minimal requirements for calling DSR routines ? 2. How do I need to setup VDP memory so that file I/O is possible. I understand that a PAB must always reside in VDP memory. But the disk controller DSR also uses VDP memory for work buffers during file I/O. Does the disk controller DSR always loads files from disk to VDP or is it possible to directly load to RAM ? 3. Is it possible to do file I/O calls in pure assembly language or do I have to involve GPL in some way? The documentation being focussed on Monitor, Basic, etc. seems to imply that GPL is always involved. Is that a necessity? 4. What is the easiest way to "interface" with DSR memory setup. I mean would have to switch between my "application workspace" outside of scratch-pad memory, into the "DSR workspace" in scratch-pad memory and return safely. 5. Any good examples out there? On a sidenote, I remember a discussion with InsaneMultitasker many moons ago where it was mentioned that a file operations document was in the works. My memory is a bit blurry on that, can't recall if this was finished or not. Cheers Filip
  4. Has anybody documented the undefined behavior of the TMS9900 data and address buses when no memory cycle is happening? I noticed this today while debugging a hardware glitch (unsuccessful so far): During the Add instruction, the databus repeats the two operand values. I don't see this behavior documented in the TMS9900 manual. It seems like a nice feature to have. I guess it's the ALU "leaking" its values onto the data bus. What does an Add instruction do? The sequence of operations is roughly: instruction fetch instruction decode fetch source operand fetch destination operand internal ALU cycle (in this case, ADD) store destination operand Here is an observed sample case where the cpu adds 0010 + dec8 = ded8: My registers: WP 83E0 PC 7d32 (whole program from 7d00 to 7d80) R0 0010 R5 A000 Bus observations (each row is at least 1 clock cycle): ADDR DATA Signals Action 7d32 a540 MEMEN DBIN IAQ read instruction: A R0,*R5 ???? xx40 decode ???? xx10 decode 83e0 xx10 MEMEN DBIN fetch R0 from 83e0 a000 dec8 MEMEN DBIN fetch dec8 from a000 ???? xxc8 internal ???? xx10 internal a000 ded8 MEMEM WE store result to a000 xx are the high byte I can't see (I'm reading the side port. I only see one half of an internal 16 bit bus read.) ?? are addresses I missed cuz I only grab the address when MEMEN is asserted. The internal cycle values xxc8 and xx10 match the destination and source values. I'll be taking more notes on other instructions.
  5. Had to say this; just installed the F18a and WOW. it was so easy to install and the picture is great! The only hard part is cutting the hole for the plug. The only program I, so far, have problems with is 'The missing link'. keep getting, 'out of memory' and Stack memory goes to 0. Since I don't use it much, don't care. on the other hand It might be my imagination but the graphics seem faster. can't wait to delve into some of the extended features.
  6. Probably lots of people had this idea already, and I've been reading about TMS9900 assembly only sporadically. Let CALLEE be the address of a subroutine like this: CALLEE (instruction) (instruction) (instruction) ... RTWP And my idea for a "reentrant call": STWP R8 S 36,R8 MOV R8, @32(R8) MOV CALLEE, @34(R8) BLWP @32(R8) Could be turned into a macro, and the trashed register cound be any one that doesn't have a special use (R12-R15). I did this on paper only, so it may have a few holes. Also, this is NOT for hardware interrupts! And, of course, for machines with a respectable amount of RAM -- definitely not a base 99/4A! So, makes sense? Is it horribly slow and wasteful and a much better method exists? EDIT: No, wait, wait. I don't need that additional space for the transfer vector. It can be located in the middle of the new workspace. STWP R8 S 32,R8 MOV R8, @8(R8) MOV CALLEE, @10(R8) BLWP @8(R8) EDIT II, THE SEQUEL: And if I didn't mind trashing the first few registers of my current WP I could even make them overlap! What do you think?
  7. Do we have sample code showing how to do a device CRU scan. What I would like to accomplish is scan and identify peripheral expansion cards like HRD3000, RS232, SAMS, ... Basically something like we have in the CFG834 configuration program.
  8. So it has been a few years since I've done TMS9900 assembly language programming. Here's a recycled demo where I've now attached a speech sample. Tried it with classic99. Anyone willing to try if this also works on the real deal? It's an 8K image, scratchpad memory only. You'll need a supercart and a speech synthesizer to run this. CART.bin
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