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  1. Hello everyone I'm in the process of building a VCS based hardware clone from scratch and have a few queries; I am going to replace the 6507 with 6502 (to get full 64k addressing + hardware interrupts + phi 1 and phi2 clocks ) and adding 32k of extra ram like the super Atari project (site is down but thanks for the wayback machine http://bit.ly/2FHlAH7) But these "NEW" eBay 6502 cpus (http://ebay.to/2DzjYJC) should work, or are these new chips like 65c02 in that the silicon has been altered due to "modern manufacture reasons"? And what's the highest clock speed available on a 6502? Also can you place some asynchronous buffer sram [cy7c408 = 128byte sram fifo memory] (http://bit.ly/2HGAAlm) between the data lines on the tia and 6502/7, so that the when the TIA Is drawing the data is already in the buffer, and all the cpu needs to do is correctly send the corrects address locations relevant to data stored in the buffer? (i.e instead of cpu calculating the display every scan-line you simply write a few scan-lines of image data into the buffer before The TIA begins to draw, then just correctly address in the order of whats stored in the buffer and do program logic) Since the [cy7c408a] is dual ported with asynchronous R/W, means you can just clock the output data [DO0-DO7] bus with the 1.19MHz clock from the TIA, iirc the TIA doesn't tend to like bus speeds higher than 1.19MHz? Then this should allow one to overclock the 6502 with for simplicity of counting cycles a multiple of the [ntsc] color-burst [TIA] clock ( i.e being able to have 684 cpu cycles per scan-line {using a 6502 clocked @ 10.75MHz = ~3x the TIA clock } instead of just 76 cycles) in such cases also sacrificing [native 2600] compatibility for increased cpu speed and more time for crunching instructions. I would also assume having the TIA reading the buffer @ 1.19Mhz would present in situations a bottleneck as well (when "drawing" to the TIA)? Since you can write data faster to the buffer than its being read (if the CPU is overclocked)? Since it seems the cy7c408 operates similar to a giant shift register, once its written you have to wait until data to reach to the TIA before it you write new data?? Can you just fill the buffer with 128 bytes of scan-line/sound data for the TIA, then handle the TIA addressing, and just fill the buffer as its being emptied, and essentially have 128 bytes of "VRam" (well more like Video buffer)? Also Can NMI be used instead of RDY, so that when the tia begins a new frame, wsync simply have the TIA tell the 6502 to "Stop, Pause , Go and do Display routine and then come back here", instead of just halting the cpu? Aswell i have a few microchip and avr (atmega8515) mcu's laying around wanting to be used for something and with a both MCU's, it's instructions are pipelined so that it takes effectively 1 cycle to load and execute data or decode and execute an instruction, except iirc when changing the program counter which iirc takes 2 - 3 cycles, So you don't have wait states [i.e iirc if using a z80, thats takes 3+ cycles for most of its instructions which is why they have such high clocks]. Is it possible to use the atmega or 18f4550 as sort of display controller for the TIA having the MCU handle reads from the buffer instead, and handle writing the data to the TIA, and use the atmega8515 to emulate the RIOT? Is it possible to emulate the Riot but with 256 bytes of ram? iirc RIOT ram is in page 0 so is faster to access than the 32k of extra ram? Plus is it possible, using A12 and A15 with a 74hc138 and a logic gate or two as a way to partially decode address to swap between cartridge space and 32k ram, so one can simply keep some compatibility, simply if A12 is high and A15 low then cartridge ROM is accessed, and if A15 is high in any case 32k Ram is Accessed? just building it to just play 2600 games isn't really hard (it was done from 1977 to 1992 literally millions of times), and seems a little redundant to me, I just figured since you can build your own 2600 compatible hardware clone for less than $50 in parts shipped, why not beef it up for some shits and giggles like a dev kit, have 256k of rom space and 32k ram, 6502, if possible using an MCU or 2 as an "In Hardware display Kernel", as well as emulate the riot, And CO10444D. why you ask? Because i i'll have the only atari "super" VCS with full USB 2.0 support (upto 12Mbit/s if I do use the 18f4550 lol) and plus i can really push the hardware to the limit see what it can do with some actual "power" behind it
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